@@ -15,12 +15,12 @@ include "execution.pil";
1515 * sha256.start { sha256.execution_clk, sha256.space_id, sha256.output_addr, sha256.state_addr, sha256.input_addr, sha256.err };
1616 *
1717 * This trace reads and writes the following:
18- * (1) Read State: From { state_addr, state_addr + 1, ..., state_addr + 7 }
18+ * (1) Read State: From { state_addr, state_addr + 1, ..., state_addr + 7 }
1919 * (2) Read Input: From { input_addr, input_addr + 1, ..., input_addr + 15 }
2020 * (3) Write Output: From { output_addr, output_addr + 1, ..., output_addr + 7 }
2121 * All values operated on in this subtrace are validated to be U32.
2222 * This subtrace has a mix of a vertical and horizontal memory accesses.
23- * The State and Outputs are written horizontally (i.e. there are 8 columns), this means that
23+ * The State and Outputs are written horizontally (i.e. there are 8 columns), this means that
2424 * they are loaded in "parallel" and therefore they form their own temporality groups (for the purpose of any errors)
2525 * The Input is "mixed" into the hash at each round (from round 1 to 16), this means the inputs are loaded in a single column and the i-th input
2626 * is loaded in the i-th row of computation. Therefore, a single load is a temporality group (for the purpose of errors).
@@ -90,7 +90,7 @@ include "execution.pil";
9090 */
9191
9292namespace sha256;
93-
93+
9494 pol commit sel;
9595 sel * (1 - sel) = 0;
9696
@@ -117,7 +117,7 @@ namespace sha256;
117117 #[LATCH_HAS_SEL_ON] // sel = 1 when latch = 1, sel = 0 at first row because of shift relations
118118 latch * (1 - sel) = 0;
119119 // This is now guaranteed to be mututally exclusive because of the above condition and since sel = 0 at row = 0 (since it has shifts)
120- pol LATCH_CONDITION = latch + precomputed.first_row;
120+ pol LATCH_CONDITION = latch + precomputed.first_row;
121121
122122 #[START_AFTER_LAST]
123123 sel' * (start' - LATCH_CONDITION) = 0;
@@ -177,7 +177,7 @@ namespace sha256;
177177 // Memory Operations: State and Output
178178 ////////////////////////////////////////////////////////
179179 // Since reading the hash state and writing the hash outputs have similar "shapes" (i.e. 8 columns)
180- // and occur at different "times" (the start and end (latch) respectively), we define a set of
180+ // and occur at different "times" (the start and end (latch) respectively), we define a set of
181181 // shared columns that we can re-use between the two. This saves us ~24 columns and 8 permutations.
182182
183183 pol commit memory_address[8]; // Addresses to read from or write to
@@ -230,101 +230,100 @@ namespace sha256;
230230 // flag that accounts for this
231231 pol commit rw;
232232 rw = OUTPUT_WRITE_CONDITION;
233- // TODO: These need to be changed to permutations once we have the custom permutation selectors impl
234233 #[MEM_OP_0]
235- sel_mem_state_or_output {
236- execution_clk, memory_address[0] ,
237- memory_register [0], memory_tag [0],
238- space_id, /*rw=*/ rw
239- } in
240- memory.sel {
241- memory.clk, memory.address ,
242- memory.value , memory.tag ,
243- memory.space_id, memory.rw
234+ sel_mem_state_or_output {
235+ execution_clk, space_id ,
236+ memory_address [0], memory_register [0],
237+ memory_tag[0], /*rw=*/ rw
238+ } is
239+ memory.sel_sha256_op[0] {
240+ memory.clk, memory.space_id ,
241+ memory.address , memory.value ,
242+ memory.tag, memory.rw
244243 };
245244
246245 #[MEM_OP_1]
247- sel_mem_state_or_output {
248- execution_clk, memory_address[1] ,
249- memory_register [1], memory_tag [1],
250- space_id, /*rw=*/ rw
251- } in
252- memory.sel {
253- memory.clk, memory.address ,
254- memory.value , memory.tag ,
255- memory.space_id, memory.rw
246+ sel_mem_state_or_output {
247+ execution_clk, space_id ,
248+ memory_address [1], memory_register [1],
249+ memory_tag[1], /*rw=*/ rw
250+ } is
251+ memory.sel_sha256_op[1] {
252+ memory.clk, memory.space_id ,
253+ memory.address , memory.value ,
254+ memory.tag, memory.rw
256255 };
257256
258257 #[MEM_OP_2]
259- sel_mem_state_or_output {
260- execution_clk, memory_address[2] ,
261- memory_register [2], memory_tag [2],
262- space_id, /*rw=*/ rw
263- } in
264- memory.sel {
265- memory.clk, memory.address ,
266- memory.value , memory.tag ,
267- memory.space_id, memory.rw
258+ sel_mem_state_or_output {
259+ execution_clk, space_id ,
260+ memory_address [2], memory_register [2],
261+ memory_tag[2], /*rw=*/ rw
262+ } is
263+ memory.sel_sha256_op[2] {
264+ memory.clk, memory.space_id ,
265+ memory.address , memory.value ,
266+ memory.tag, memory.rw
268267 };
269268
270269 #[MEM_OP_3]
271- sel_mem_state_or_output {
272- execution_clk, memory_address[3] ,
273- memory_register [3], memory_tag [3],
274- space_id, /*rw=*/ rw
275- } in
276- memory.sel {
277- memory.clk, memory.address ,
278- memory.value , memory.tag ,
279- memory.space_id, memory.rw
270+ sel_mem_state_or_output {
271+ execution_clk, space_id ,
272+ memory_address [3], memory_register [3],
273+ memory_tag[3], /*rw=*/ rw
274+ } is
275+ memory.sel_sha256_op[3] {
276+ memory.clk, memory.space_id ,
277+ memory.address , memory.value ,
278+ memory.tag, memory.rw
280279 };
281280
282281 #[MEM_OP_4]
283- sel_mem_state_or_output {
284- execution_clk, memory_address[4] ,
285- memory_register [4], memory_tag [4],
286- space_id, /*rw=*/ rw
287- } in
288- memory.sel {
289- memory.clk, memory.address ,
290- memory.value , memory.tag ,
291- memory.space_id, memory.rw
282+ sel_mem_state_or_output {
283+ execution_clk, space_id ,
284+ memory_address [4], memory_register [4],
285+ memory_tag[4], /*rw=*/ rw
286+ } is
287+ memory.sel_sha256_op[4] {
288+ memory.clk, memory.space_id ,
289+ memory.address , memory.value ,
290+ memory.tag, memory.rw
292291 };
293292
294293 #[MEM_OP_5]
295- sel_mem_state_or_output {
296- execution_clk, memory_address[5] ,
297- memory_register [5], memory_tag [5],
298- space_id, /*rw=*/ rw
299- } in
300- memory.sel {
301- memory.clk, memory.address ,
302- memory.value , memory.tag ,
303- memory.space_id, memory.rw
294+ sel_mem_state_or_output {
295+ execution_clk, space_id ,
296+ memory_address [5], memory_register [5],
297+ memory_tag[5], /*rw=*/ rw
298+ } is
299+ memory.sel_sha256_op[5] {
300+ memory.clk, memory.space_id ,
301+ memory.address , memory.value ,
302+ memory.tag, memory.rw
304303 };
305304
306305 #[MEM_OP_6]
307- sel_mem_state_or_output {
308- execution_clk, memory_address[6] ,
309- memory_register [6], memory_tag [6],
310- space_id, /*rw=*/ rw
311- } in
312- memory.sel {
313- memory.clk, memory.address ,
314- memory.value , memory.tag ,
315- memory.space_id, memory.rw
306+ sel_mem_state_or_output {
307+ execution_clk, space_id ,
308+ memory_address [6], memory_register [6],
309+ memory_tag[6], /*rw=*/ rw
310+ } is
311+ memory.sel_sha256_op[6] {
312+ memory.clk, memory.space_id ,
313+ memory.address , memory.value ,
314+ memory.tag, memory.rw
316315 };
317316
318317 #[MEM_OP_7]
319- sel_mem_state_or_output {
320- execution_clk, memory_address[7] ,
321- memory_register [7], memory_tag [7],
322- space_id, /*rw=*/ rw
323- } in
324- memory.sel {
325- memory.clk, memory.address ,
326- memory.value , memory.tag ,
327- memory.space_id, memory.rw
318+ sel_mem_state_or_output {
319+ execution_clk, space_id ,
320+ memory_address [7], memory_register [7],
321+ memory_tag[7], /*rw=*/ rw
322+ } is
323+ memory.sel_sha256_op[7] {
324+ memory.clk, memory.space_id ,
325+ memory.address , memory.value ,
326+ memory.tag, memory.rw
328327 };
329328
330329 ////////////////////////////////////////////////
@@ -345,7 +344,7 @@ namespace sha256;
345344 pol BATCHED_TAG_CHECK = 2**0 * STATE_TAG_DIFF_0 + 2**3 * STATE_TAG_DIFF_1
346345 + 2**6 * STATE_TAG_DIFF_2 + 2**9 * STATE_TAG_DIFF_3
347346 + 2**12 * STATE_TAG_DIFF_4 + 2**15 * STATE_TAG_DIFF_5
348- + 2**18 * STATE_TAG_DIFF_6 + 2**21 * STATE_TAG_DIFF_7;
347+ + 2**18 * STATE_TAG_DIFF_6 + 2**21 * STATE_TAG_DIFF_7;
349348
350349 pol commit batch_tag_inv;
351350 #[BATCH_ZERO_CHECK_READ]
@@ -385,7 +384,7 @@ namespace sha256;
385384 sel * (1 - LATCH_CONDITION) * (input_rounds_rem' - (input_rounds_rem - sel_is_input_round)) = 0;
386385
387386 // Read input if we have not had an error from the previous temporality groups and this is an input round
388- pol commit sel_read_input_from_memory;
387+ pol commit sel_read_input_from_memory;
389388 sel_read_input_from_memory = sel * (1 - mem_out_of_range_err) * sel_is_input_round * (1 - sel_invalid_state_tag_err);
390389
391390 // Put the result of the input loads in to the corresponding w value
@@ -396,15 +395,15 @@ namespace sha256;
396395 pol commit input_tag;
397396
398397 #[MEM_INPUT_READ]
399- sel_read_input_from_memory {
400- execution_clk, input_addr ,
401- input , input_tag ,
402- space_id, /*rw=*/ precomputed.zero
403- } in
404- memory.sel {
405- memory.clk, memory.address ,
406- memory.value , memory.tag ,
407- memory.space_id, memory.rw
398+ sel_read_input_from_memory {
399+ execution_clk, space_id ,
400+ input_addr , input ,
401+ input_tag, /*rw=*/ precomputed.zero
402+ } is
403+ memory.sel_sha256_read {
404+ memory.clk, memory.space_id ,
405+ memory.address , memory.value ,
406+ memory.tag, memory.rw
408407 };
409408
410409 ////////////////////////////////////////////////
@@ -418,7 +417,7 @@ namespace sha256;
418417 pol commit sel_invalid_input_row_tag_err;
419418 sel_invalid_input_row_tag_err * (1 - sel_invalid_input_row_tag_err) = 0;
420419
421- pol INPUT_TAG_DIFF = sel_read_input_from_memory * (input_tag - constants.MEM_TAG_U32);
420+ pol INPUT_TAG_DIFF = sel_read_input_from_memory * (input_tag - constants.MEM_TAG_U32);
422421 pol commit input_tag_diff_inv;
423422 // Iff INPUT_TAG_DIFF != 0, sel_invalid_input_row_tag_err = 1
424423 #[INPUT_TAG_DIFF_CHECK]
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