info.yaml

# Tiny Tapeout project information
project:
  title:        "underserved"
  author:       "Olof Kindgren"
  discord:      "awardwinningolof_67894"
  description:  "The award-winning SERV, the world's smallest RISC-V CPU. Now on Tiny Tapeout!"
  language:     "Verilog" # other examples include SystemVerilog, Amaranth, VHDL, etc
  clock_hz:     20000000

  # How many tiles your design occupies? A single tile is about 167x108 uM.
  tiles: "1x2"

  # Your top module name must start with "tt_um_". Make it unique by including your github username:
  top_module:  "tt_um_underserved"
  
  # List your project's source files here. Source files must be in ./src and you must list each source file separately, one per line:
  source_files:        
    - serv_1.2.1/rtl/serv_bufreg.v
    - serv_1.2.1/rtl/serv_bufreg2.v
    - serv_1.2.1/rtl/serv_alu.v
    - serv_1.2.1/rtl/serv_csr.v
    - serv_1.2.1/rtl/serv_ctrl.v
    - serv_1.2.1/rtl/serv_decode.v
    - serv_1.2.1/rtl/serv_immdec.v
    - serv_1.2.1/rtl/serv_mem_if.v
    - serv_1.2.1/rtl/serv_rf_if.v
    - serv_1.2.1/rtl/serv_rf_ram_if.v
    - serv_1.2.1/rtl/serv_rf_ram.v
    - serv_1.2.1/rtl/serv_state.v
    - serv_1.2.1/rtl/serv_top.v
    - serv_1.2.1/rtl/serv_rf_top.v
    - serv_1.2.1/rtl/serv_aligner.v
    - serv_1.2.1/rtl/serv_compdec.v
    - subservient_gpio.v
    - rf_shift_reg.v
    - spimemio.v
    - underserved.v

# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
pinout:
  # Inputs
  ui[0]: ""
  ui[1]: ""
  ui[2]: ""
  ui[3]: ""
  ui[4]: ""
  ui[5]: ""
  ui[6]: ""
  ui[7]: ""

  # Outputs
  uo[0]: "gpio0"
  uo[1]: "gpio1"
  uo[2]: "gpio2"
  uo[3]: "gpio3"
  uo[4]: "gpio4"
  uo[5]: "sclk"
  uo[6]: "cs_n"
  uo[7]: "mosi"

  # Bidirectional pins
  uio[0]: ""
  uio[1]: ""
  uio[2]: ""
  uio[3]: ""
  uio[4]: ""
  uio[5]: ""
  uio[6]: ""
  uio[7]: "miso"

# Do not change!
yaml_version: 6