Skip to content

Commit 7246482

Browse files
committed
cleaning
1 parent 0405ce5 commit 7246482

File tree

2 files changed

+2
-2
lines changed

2 files changed

+2
-2
lines changed

edg/abstract_parts/DigitalAmplifiers.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ class HighSideSwitch(PowerSwitch, KiCadSchematicBlock, GeneratorBlock):
1515
TODO: clamp_voltage should be compared against the actual voltage so the clamp is automatically generated,
1616
but generators don't support link terms (yet?)"""
1717
@init_in_parent
18-
def __init__(self, pull_resistance: RangeLike = 10000*Ohm(tol=0.05), max_rds: FloatLike = 1*Ohm,
18+
def __init__(self, pull_resistance: RangeLike = 10*kOhm(tol=0.05), max_rds: FloatLike = 1*Ohm,
1919
frequency: RangeLike = RangeExpr.ZERO, *,
2020
clamp_voltage: RangeLike = RangeExpr.ZERO, clamp_resistance_ratio: FloatLike = 10) -> None:
2121
super().__init__()

edg/abstract_parts/PowerCircuits.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,7 @@ class FetPrecharge(Block):
125125
TODO: calculate power rating needed for some capacitance instead of spec'ing for DC"""
126126
@init_in_parent
127127
def __init__(self, precharge_resistance: RangeLike = 100*Ohm(tol=0.1),
128-
pull_resistance: RangeLike = 10000*Ohm(tol=0.05),
128+
pull_resistance: RangeLike = 10*kOhm(tol=0.05),
129129
max_rds: FloatLike = 1*Ohm):
130130
super().__init__()
131131
self.gnd = self.Port(Ground.empty(), [Common])

0 commit comments

Comments
 (0)