last changes

Author: ducky64

edg/abstract_parts/AbstractResistor.py

@@ -379,3 +379,45 @@ def contents(self):
   def symbol_pinning(self, symbol_name: str) -> Dict[str, Port]:
     assert symbol_name == 'Device:R'
     return {'1': self.signal_in, '2': self.signal_out}
+
+
+class DigitalClampResistor(Protection, KiCadImportableBlock):
+  """Inline resistor that limits the current (to a parameterized amount) which works in concert
+  with ESD diodes in the downstream device to clamp the signal voltage to allowable levels.
+
+  The protection voltage can be extended beyond the modeled range from the input signal,
+  and can also be specified to allow zero output voltage (for when the downstream device
+  is powered down)
+
+  TODO: clamp_target should be inferred from the target voltage_limits,
+  but voltage_limits doesn't always get propagated."""
+  @init_in_parent
+  def __init__(self, clamp_target: RangeLike = (0, 3)*Volt, clamp_current: RangeLike = (1.0, 10)*mAmp,
+               protection_voltage: RangeLike = (0, 0)*Volt, zero_out: BoolLike = False):
+    super().__init__()
+
+    self.signal_in = self.Port(DigitalSink.empty(), [Input])
+    self.signal_out = self.Port(DigitalSource.empty(), [Output])
+
+    self.clamp_target = self.ArgParameter(clamp_target)
+    self.clamp_current = self.ArgParameter(clamp_current)
+    self.protection_voltage = self.ArgParameter(protection_voltage)
+    self.zero_out = self.ArgParameter(zero_out)
+
+  def contents(self):
+    super().contents()
+
+    # TODO bidirectional clamping calcs?
+    self.res = self.Block(Resistor(resistance=1/self.clamp_current * self.zero_out.then_else(
+      self.signal_in.link().voltage.hull(self.protection_voltage).upper(),
+      self.signal_in.link().voltage.hull(self.protection_voltage).upper() - self.clamp_target.upper(),
+      )))
+    self.connect(self.res.a.adapt_to(DigitalSink(current_draw=self.signal_out.link().current_drawn)), self.signal_in)
+    self.connect(self.res.b.adapt_to(DigitalSource(
+      voltage_out=self.signal_in.link().voltage.intersect(self.clamp_target),
+      output_thresholds=self.signal_in.link().output_thresholds
+    )), self.signal_out)
+
+  def symbol_pinning(self, symbol_name: str) -> Dict[str, Port]:
+    assert symbol_name == 'Device:R'
+    return {'1': self.signal_in, '2': self.signal_out}

edg/abstract_parts/__init__.py

@@ -29,7 +29,7 @@
     UflConnector, SmaConnector, SmaMConnector, SmaFConnector
 from .AbstractResistor import Resistor, ResistorStandardFootprint, TableResistor, SeriesResistor
 from .AbstractResistor import PulldownResistor, PullupResistor, PulldownResistorArray, PullupResistorArray
-from .AbstractResistor import SeriesPowerResistor, CurrentSenseResistor, AnalogClampResistor
+from .AbstractResistor import SeriesPowerResistor, CurrentSenseResistor, AnalogClampResistor, DigitalClampResistor
 from .AbstractResistorArray import ResistorArray, ResistorArrayStandardFootprint, TableResistorArray
 from .AbstractCapacitor import UnpolarizedCapacitor, Capacitor, CeramicCapacitor, AluminumCapacitor, \
     CapacitorStandardFootprint, TableCapacitor, TableDeratingCapacitor