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‎blinky_skeleton.py‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -4,11 +4,11 @@
44

55

66
class BlinkyExample(SimpleBoardTop):
7-
@override
8-
def contents(self) -> None:
9-
super().contents()
10-
# your implementation here
7+
@override
8+
def contents(self) -> None:
9+
super().contents()
10+
# your implementation here
1111

1212

1313
if __name__ == "__main__":
14-
compile_board_inplace(BlinkyExample)
14+
compile_board_inplace(BlinkyExample)

‎edg/BoardCompiler.py‎

Lines changed: 49 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -11,64 +11,65 @@
1111

1212

1313
def compile_board(design: Type[Block], target_dir_name: Optional[Tuple[str, str]]) -> CompiledDesign:
14-
if target_dir_name is not None:
15-
(target_dir, target_name) = target_dir_name
16-
if not os.path.exists(target_dir):
17-
os.makedirs(target_dir)
18-
assert os.path.isdir(target_dir), f"target_dir {target_dir} to compile_board must be directory"
14+
if target_dir_name is not None:
15+
(target_dir, target_name) = target_dir_name
16+
if not os.path.exists(target_dir):
17+
os.makedirs(target_dir)
18+
assert os.path.isdir(target_dir), f"target_dir {target_dir} to compile_board must be directory"
1919

20-
design_filename = os.path.join(target_dir, f'{target_name}.edg')
21-
netlist_filename = os.path.join(target_dir, f'{target_name}.net')
22-
bom_filename = os.path.join(target_dir, f'{target_name}.csv')
23-
svgpcb_filename = os.path.join(target_dir, f'{target_name}.svgpcb.js')
20+
design_filename = os.path.join(target_dir, f"{target_name}.edg")
21+
netlist_filename = os.path.join(target_dir, f"{target_name}.net")
22+
bom_filename = os.path.join(target_dir, f"{target_name}.csv")
23+
svgpcb_filename = os.path.join(target_dir, f"{target_name}.svgpcb.js")
2424

25-
with suppress(FileNotFoundError):
26-
os.remove(design_filename)
27-
with suppress(FileNotFoundError):
28-
os.remove(netlist_filename)
29-
with suppress(FileNotFoundError):
30-
os.remove(bom_filename)
31-
with suppress(FileNotFoundError):
32-
os.remove(svgpcb_filename)
25+
with suppress(FileNotFoundError):
26+
os.remove(design_filename)
27+
with suppress(FileNotFoundError):
28+
os.remove(netlist_filename)
29+
with suppress(FileNotFoundError):
30+
os.remove(bom_filename)
31+
with suppress(FileNotFoundError):
32+
os.remove(svgpcb_filename)
3333

34-
compiled = ScalaCompiler.compile(design, ignore_errors=True)
35-
compiled.append_values(RefdesRefinementPass().run(compiled))
34+
compiled = ScalaCompiler.compile(design, ignore_errors=True)
35+
compiled.append_values(RefdesRefinementPass().run(compiled))
3636

37-
if target_dir_name is not None: # always dump the proto even if there is an error
38-
with open(design_filename, 'wb') as raw_file:
39-
raw_file.write(compiled.design.SerializeToString())
37+
if target_dir_name is not None: # always dump the proto even if there is an error
38+
with open(design_filename, "wb") as raw_file:
39+
raw_file.write(compiled.design.SerializeToString())
4040

41-
if compiled.errors:
42-
from . import core
43-
raise core.ScalaCompilerInterface.CompilerCheckError(f"error during compilation:\n{compiled.errors_str()}")
41+
if compiled.errors:
42+
from . import core
4443

45-
netlist_all = NetlistBackend().run(compiled)
46-
bom_all = GenerateBom().run(compiled)
47-
svgpcb_all = SvgPcbBackend().run(compiled)
48-
assert len(netlist_all) == 1
44+
raise core.ScalaCompilerInterface.CompilerCheckError(f"error during compilation:\n{compiled.errors_str()}")
4945

50-
if target_dir_name is not None:
51-
with open(netlist_filename, 'w', encoding='utf-8') as net_file:
52-
net_file.write(netlist_all[0][1])
46+
netlist_all = NetlistBackend().run(compiled)
47+
bom_all = GenerateBom().run(compiled)
48+
svgpcb_all = SvgPcbBackend().run(compiled)
49+
assert len(netlist_all) == 1
5350

54-
with open(bom_filename, 'w', encoding='utf-8') as bom_file:
55-
bom_file.write(bom_all[0][1])
51+
if target_dir_name is not None:
52+
with open(netlist_filename, "w", encoding="utf-8") as net_file:
53+
net_file.write(netlist_all[0][1])
5654

57-
if svgpcb_all:
58-
with open(svgpcb_filename, 'w', encoding='utf-8') as bom_file:
59-
bom_file.write(svgpcb_all[0][1])
55+
with open(bom_filename, "w", encoding="utf-8") as bom_file:
56+
bom_file.write(bom_all[0][1])
6057

61-
return compiled
58+
if svgpcb_all:
59+
with open(svgpcb_filename, "w", encoding="utf-8") as bom_file:
60+
bom_file.write(svgpcb_all[0][1])
61+
62+
return compiled
6263

6364

6465
def compile_board_inplace(design: Type[Block], generate: bool = True) -> CompiledDesign:
65-
"""Compiles a board and writes the results in a sub-directory
66-
where the module containing the top-level is located"""
67-
designfile = inspect.getfile(design)
68-
if generate:
69-
target_dir_name = (os.path.join(os.path.dirname(designfile), design.__name__), design.__name__)
70-
else:
71-
target_dir_name = None
72-
compiled = compile_board(design, target_dir_name)
73-
74-
return compiled
66+
"""Compiles a board and writes the results in a sub-directory
67+
where the module containing the top-level is located"""
68+
designfile = inspect.getfile(design)
69+
if generate:
70+
target_dir_name = (os.path.join(os.path.dirname(designfile), design.__name__), design.__name__)
71+
else:
72+
target_dir_name = None
73+
compiled = compile_board(design, target_dir_name)
74+
75+
return compiled

‎edg/BoardTop.py‎

Lines changed: 113 additions & 114 deletions
Original file line numberDiff line numberDiff line change
@@ -4,135 +4,134 @@
44

55

66
class BaseBoardTop(DesignTop):
7-
"""Design top with refinements for intermediate-level (0603+ SMD), hand-solderable components."""
8-
def __init__(self) -> None:
9-
super().__init__()
10-
self.refdes_prefix = self.Parameter(StringExpr())
11-
self.assign(self.refdes_prefix, "") # override with refinements
12-
13-
@override
14-
def refinements(self) -> Refinements:
15-
return super().refinements() + Refinements(
16-
class_refinements=[
17-
(Resistor, GenericChipResistor),
18-
(ResistorArray, JlcResistorArray), # TODO: replace with generic resistor array
19-
(Capacitor, GenericMlcc),
20-
(Inductor, JlcInductor), # TODO: replace with generic inductor
21-
(Switch, SmtSwitch),
22-
(RotaryEncoder, Ec11j15WithSwitch),
23-
(Diode, JlcDiode), # TODO: replace with non-distributor parts list
24-
(ZenerDiode, JlcZenerDiode), # TODO: replace with non-distributor parts list
25-
(Bjt, JlcBjt), # TODO: replace with non-distributor parts list
26-
(Fet, JlcFet), # TODO: replace with non-distributor parts list
27-
(SwitchFet, JlcSwitchFet), # TODO: replace with non-distributor parts list
28-
(Led, SmtLed),
29-
(RgbLedCommonAnode, Smt0606RgbLed),
30-
(Crystal, JlcCrystal), # TODO: replace with non-distributor parts list
31-
(Oscillator, JlcOscillator), # TODO: replace with non-distributor parts list
32-
33-
(Jumper, SolderJumperTriangular),
34-
(IndicatorSinkLed, IndicatorSinkLedResistor),
35-
36-
(Fpc050Bottom, HiroseFh12sh),
37-
(UsbEsdDiode, Tpd2e009),
38-
(CanEsdDiode, Pesd1can),
39-
(Fuse, Nano2Fuseholder),
40-
(TestPoint, TeRc),
41-
42-
(SwdCortexTargetConnector, SwdCortexTargetHeader),
43-
44-
(SpiMemory, W25q),
45-
46-
(Speaker, ConnectorSpeaker),
47-
], class_values=[
48-
(SelectorArea, ['footprint_area'], Range.from_lower(4.0)), # at least 0603
49-
]
50-
)
7+
"""Design top with refinements for intermediate-level (0603+ SMD), hand-solderable components."""
8+
9+
def __init__(self) -> None:
10+
super().__init__()
11+
self.refdes_prefix = self.Parameter(StringExpr())
12+
self.assign(self.refdes_prefix, "") # override with refinements
13+
14+
@override
15+
def refinements(self) -> Refinements:
16+
return super().refinements() + Refinements(
17+
class_refinements=[
18+
(Resistor, GenericChipResistor),
19+
(ResistorArray, JlcResistorArray), # TODO: replace with generic resistor array
20+
(Capacitor, GenericMlcc),
21+
(Inductor, JlcInductor), # TODO: replace with generic inductor
22+
(Switch, SmtSwitch),
23+
(RotaryEncoder, Ec11j15WithSwitch),
24+
(Diode, JlcDiode), # TODO: replace with non-distributor parts list
25+
(ZenerDiode, JlcZenerDiode), # TODO: replace with non-distributor parts list
26+
(Bjt, JlcBjt), # TODO: replace with non-distributor parts list
27+
(Fet, JlcFet), # TODO: replace with non-distributor parts list
28+
(SwitchFet, JlcSwitchFet), # TODO: replace with non-distributor parts list
29+
(Led, SmtLed),
30+
(RgbLedCommonAnode, Smt0606RgbLed),
31+
(Crystal, JlcCrystal), # TODO: replace with non-distributor parts list
32+
(Oscillator, JlcOscillator), # TODO: replace with non-distributor parts list
33+
(Jumper, SolderJumperTriangular),
34+
(IndicatorSinkLed, IndicatorSinkLedResistor),
35+
(Fpc050Bottom, HiroseFh12sh),
36+
(UsbEsdDiode, Tpd2e009),
37+
(CanEsdDiode, Pesd1can),
38+
(Fuse, Nano2Fuseholder),
39+
(TestPoint, TeRc),
40+
(SwdCortexTargetConnector, SwdCortexTargetHeader),
41+
(SpiMemory, W25q),
42+
(Speaker, ConnectorSpeaker),
43+
],
44+
class_values=[
45+
(SelectorArea, ["footprint_area"], Range.from_lower(4.0)), # at least 0603
46+
],
47+
)
5148

5249

5350
class BoardTop(BaseBoardTop):
54-
pass
51+
pass
5552

5653

5754
class JlcToolingHole(InternalSubcircuit, FootprintBlock):
58-
@override
59-
def contents(self) -> None:
60-
super().contents()
61-
self.footprint(
62-
'H', 'edg:JlcToolingHole_1.152mm',
63-
{},
64-
datasheet='https://support.jlcpcb.com/article/92-how-to-add-tooling-holes-for-smt-assembly-order'
65-
)
55+
@override
56+
def contents(self) -> None:
57+
super().contents()
58+
self.footprint(
59+
"H",
60+
"edg:JlcToolingHole_1.152mm",
61+
{},
62+
datasheet="https://support.jlcpcb.com/article/92-how-to-add-tooling-holes-for-smt-assembly-order",
63+
)
6664

6765

6866
class JlcToolingHoles(InternalSubcircuit, Block):
69-
@override
70-
def contents(self) -> None:
71-
super().contents()
72-
self.th1 = self.Block(JlcToolingHole())
73-
self.th2 = self.Block(JlcToolingHole())
74-
self.th3 = self.Block(JlcToolingHole())
67+
@override
68+
def contents(self) -> None:
69+
super().contents()
70+
self.th1 = self.Block(JlcToolingHole())
71+
self.th2 = self.Block(JlcToolingHole())
72+
self.th3 = self.Block(JlcToolingHole())
7573

7674

7775
class JlcTopRefinements(BaseBoardTop):
78-
"""Design top with refinements to use parts from JLC's assembly service"""
79-
@override
80-
def refinements(self) -> Refinements:
81-
return super().refinements() + Refinements(
82-
class_refinements=[
83-
(Resistor, JlcResistor),
84-
(Capacitor, JlcCapacitor),
85-
(Inductor, JlcInductor),
86-
(AluminumCapacitor, JlcAluminumCapacitor),
87-
(FerriteBead, JlcFerriteBead),
88-
(PptcFuse, JlcPptcFuse),
89-
(ResistorArray, JlcResistorArray),
90-
(Crystal, JlcCrystal),
91-
(Oscillator, JlcOscillator),
92-
93-
(Switch, JlcSwitch),
94-
(Led, JlcLed),
95-
(ZenerDiode, JlcZenerDiode),
96-
(Diode, JlcDiode),
97-
(Bjt, JlcBjt),
98-
(Fet, JlcFet),
99-
(Antenna, JlcAntenna),
100-
101-
(Fpc050Bottom, Afc01),
102-
(Fpc050Top, Afc07Top),
103-
(Fpc030Bottom, HiroseFh35cshw),
104-
(UsbEsdDiode, Pesd5v0x1bt),
105-
(Comparator, Lmv331),
106-
(Opamp, Lmv321),
107-
(SpiMemory, W25q), # 128M version is a basic part
108-
(TestPoint, Keystone5015), # this is larger, but is part of JLC's parts inventory
109-
(UflConnector, Bwipx_1_001e),
110-
],
111-
class_values=[ # realistically only RCs are going to likely be basic parts
112-
(JlcResistor, ['require_basic_part'], True),
113-
(JlcCapacitor, ['require_basic_part'], True),
114-
],
115-
)
76+
"""Design top with refinements to use parts from JLC's assembly service"""
77+
78+
@override
79+
def refinements(self) -> Refinements:
80+
return super().refinements() + Refinements(
81+
class_refinements=[
82+
(Resistor, JlcResistor),
83+
(Capacitor, JlcCapacitor),
84+
(Inductor, JlcInductor),
85+
(AluminumCapacitor, JlcAluminumCapacitor),
86+
(FerriteBead, JlcFerriteBead),
87+
(PptcFuse, JlcPptcFuse),
88+
(ResistorArray, JlcResistorArray),
89+
(Crystal, JlcCrystal),
90+
(Oscillator, JlcOscillator),
91+
(Switch, JlcSwitch),
92+
(Led, JlcLed),
93+
(ZenerDiode, JlcZenerDiode),
94+
(Diode, JlcDiode),
95+
(Bjt, JlcBjt),
96+
(Fet, JlcFet),
97+
(Antenna, JlcAntenna),
98+
(Fpc050Bottom, Afc01),
99+
(Fpc050Top, Afc07Top),
100+
(Fpc030Bottom, HiroseFh35cshw),
101+
(UsbEsdDiode, Pesd5v0x1bt),
102+
(Comparator, Lmv331),
103+
(Opamp, Lmv321),
104+
(SpiMemory, W25q), # 128M version is a basic part
105+
(TestPoint, Keystone5015), # this is larger, but is part of JLC's parts inventory
106+
(UflConnector, Bwipx_1_001e),
107+
],
108+
class_values=[ # realistically only RCs are going to likely be basic parts
109+
(JlcResistor, ["require_basic_part"], True),
110+
(JlcCapacitor, ["require_basic_part"], True),
111+
],
112+
)
116113

117114

118115
class JlcBoardTop(JlcTopRefinements):
119-
"""Design top with refinements to use parts from JLC's assembly service and including the tooling holes"""
120-
@override
121-
def contents(self) -> None:
122-
super().contents()
123-
self.jlc_th = self.Block(JlcToolingHoles())
116+
"""Design top with refinements to use parts from JLC's assembly service and including the tooling holes"""
117+
118+
@override
119+
def contents(self) -> None:
120+
super().contents()
121+
self.jlc_th = self.Block(JlcToolingHoles())
124122

125123

126124
class SimpleBoardTop(JlcTopRefinements):
127-
"""A BoardTop with refinements that make getting started easier but may not be desirable everywhere."""
128-
@override
129-
def refinements(self) -> Refinements:
130-
return super().refinements() + Refinements(
131-
class_refinements=[
132-
(PassiveConnector, PinHeader254),
133-
],
134-
class_values=[
135-
(Nonstrict3v3Compatible, ['nonstrict_3v3_compatible'], True),
136-
(JlcInductor, ['manual_frequency_rating'], Range.all()),
137-
],
138-
)
125+
"""A BoardTop with refinements that make getting started easier but may not be desirable everywhere."""
126+
127+
@override
128+
def refinements(self) -> Refinements:
129+
return super().refinements() + Refinements(
130+
class_refinements=[
131+
(PassiveConnector, PinHeader254),
132+
],
133+
class_values=[
134+
(Nonstrict3v3Compatible, ["nonstrict_3v3_compatible"], True),
135+
(JlcInductor, ["manual_frequency_rating"], Range.all()),
136+
],
137+
)

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