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Fix examples
1 parent 71efc02 commit e1b8a91

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2 files changed

+36
-15
lines changed

2 files changed

+36
-15
lines changed

edg/abstract_parts/AbstractPowerConverters.py

Lines changed: 14 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -394,7 +394,7 @@ def generate(self) -> None:
394394
self.assign(self.actual_inductor_current_ripple, values.ripple_scale / self.inductor.actual_inductance)
395395

396396
self.connect(self.switch, self.inductor.a.adapt_to(VoltageSink(
397-
current_draw=self.pwr_out.link().current_drawn * values.effective_dutycycle
397+
current_draw=values.inductor_avg_current
398398
)))
399399
self.connect(self.pwr_out, self.inductor.b.adapt_to(VoltageSource(
400400
voltage_out=self.output_voltage,
@@ -586,13 +586,13 @@ def generate(self) -> None:
586586
self.assign(self.actual_inductor_current_ripple, values.ripple_scale / self.inductor.actual_inductance)
587587

588588
self.connect(self.pwr_in, self.inductor.a.adapt_to(VoltageSink(
589-
current_draw=self.pwr_out.link().current_drawn / (1 - values.dutycycle)
589+
current_draw=values.inductor_avg_current
590590
)))
591591
self.connect(self.switch, self.inductor.b.adapt_to(VoltageSource(
592592
voltage_out=self.output_voltage,
593593
current_limits=BuckConverterPowerPath._ilim_expr(self.inductor.actual_current_rating, self.sw_current_limits,
594594
self.actual_inductor_current_ripple)
595-
/ (1 - values.effective_dutycycle)
595+
* (1 - values.effective_dutycycle.upper)
596596
)))
597597

598598
self.in_cap = self.Block(DecouplingCapacitor(
@@ -714,13 +714,18 @@ def generate(self) -> None:
714714
BuckConverterPowerPath._buck_inductor_filter,
715715
combined_inductor_avg_current.upper, combined_ripple_scale, combined_min_ripple)
716716
))
717-
self.connect(self.switch_in, self.inductor.a)
718-
self.connect(self.switch_out, self.inductor.b)
717+
self.connect(self.switch_in, self.inductor.a.adapt_to(VoltageSink(
718+
current_draw=combined_inductor_avg_current
719+
)))
720+
self.connect(self.switch_out, self.inductor.b.adapt_to(VoltageSource(
721+
voltage_out=self.output_voltage,
722+
current_limits=BuckConverterPowerPath._ilim_expr(self.inductor.actual_current_rating, self.sw_current_limits,
723+
self.actual_inductor_current_ripple)
724+
* (1 - boost_values.effective_dutycycle.upper)
725+
)))
719726
self.assign(self.actual_inductor_current_ripple, combined_ripple_scale / self.inductor.actual_inductance)
720-
self.assign(self.actual_avg_current_rating,
721-
BuckConverterPowerPath._ilim_expr(self.inductor.actual_current_rating, self.sw_current_limits,
722-
self.actual_inductor_current_ripple))
723-
self.assign(self.actual_inductor_current, combined_inductor_avg_current + self.actual_inductor_current_ripple / 2)
727+
self.assign(self.actual_inductor_current_peak,
728+
combined_inductor_avg_current + self.actual_inductor_current_ripple / 2)
724729

725730
self.in_cap = self.Block(DecouplingCapacitor(
726731
capacitance=buck_values.input_capacitance.intersect(boost_values.input_capacitance) * Farad,

edg/parts/BuckBoostConverter_Custom.py

Lines changed: 22 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,19 @@ def __init__(self, voltage_out: RangeLike, a_current_limits: RangeLike, b_curren
1818
), [Output]) # exterior source: set output voltage + Ilim
1919

2020

21+
class VoltageSourceConnector(DummyDevice, NetBlock):
22+
"""Connects two voltage sources together (inductor output to FET center 'source')."""
23+
@init_in_parent
24+
def __init__(self, a_current_draw: RangeLike, b_current_draw: RangeLike) -> None:
25+
super().__init__()
26+
self.a = self.Port(VoltageSink(
27+
current_draw=a_current_draw
28+
), [Input]) # FET top: set output voltage, allow instantaneous current draw
29+
self.b = self.Port(VoltageSink(
30+
current_draw=b_current_draw
31+
), [Output]) # exterior source: set output voltage + Ilim
32+
33+
2134
class CustomSyncBuckBoostConverterPwm(DiscreteBoostConverter, Resettable):
2235
"""Custom synchronous buck-boost with four PWMs for the switches.
2336
Because of the MOSFET body diode, will probably be fine-ish if the buck low-side FET and the boost high-side FET
@@ -65,9 +78,10 @@ def contents(self):
6578
self.power_path.efficiency)),
6679
self.buck_sw.pwr
6780
)
68-
self.connect( # current draw used to size FETs, size for peak current
81+
(self._sw_in_force, ), _ = self.chain( # current draw used to size FETs, size for peak current
6982
self.buck_sw.out,
70-
self.power_path.switch_in.adapt_to(VoltageSink(current_draw=self.power_path.actual_inductor_current))
83+
self.Block(ForcedVoltageCurrentDraw(self.power_path.actual_inductor_current_peak)),
84+
self.power_path.switch_in
7185
)
7286

7387
self.boost_sw = self.Block(FetHalfBridge(frequency=self.frequency, fet_rds=self.rds_on))
@@ -78,11 +92,13 @@ def contents(self):
7892
(self.boost_pwr_conn, ), _ = self.chain(
7993
self.boost_sw.pwr,
8094
self.Block(VoltageSinkConnector(self.output_voltage,
81-
self.power_path.actual_inductor_current,
82-
self.power_path.actual_avg_current_rating)),
95+
Range.all(), # unused, port actually in reverse
96+
self.power_path.switch_out.current_limits)),
8397
self.pwr_out
8498
)
85-
self.connect( # current draw used to size FETs, size for peak current
86-
self.power_path.switch_out.adapt_to(VoltageSink(current_draw=self.power_path.actual_inductor_current)),
99+
(self._sw_out_force, ), _ = self.chain( # current draw used to size FETs, size for peak current
100+
self.power_path.switch_out,
101+
self.Block(VoltageSourceConnector(Range.exact(0),
102+
self.power_path.actual_inductor_current_peak)),
87103
self.boost_sw.out
88104
)

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