cp badger/tests/sp605/spartan6_clocks.v fpga_family/spartan6/spartan6_clocks.v

ldoolitt · ldoolitt · commit 06b84d9ba8c3 · 2025-01-18T19:48:48.000-08:00
diff --git a/fpga_family/spartan6/spartan6_clocks.v b/fpga_family/spartan6/spartan6_clocks.v
@@ -82,6 +82,7 @@ DCM_SP #(
 BUFG bufg125_tx(.I(xclk125_buf), .O(clk_eth));
 
 PLL_ADV #(
+    .SIM_DEVICE("SPARTAN6"),
     .BANDWIDTH("OPTIMIZED"),
     .CLKIN1_PERIOD(clkin_period),
     .CLKFBOUT_MULT(plladv_mult), // 200x5=1000
