Merge branch 'master' into arc_nanc

Author: joadiazcr

Dockerfile.bedrock_testing_base_bookworm

@@ -133,10 +133,9 @@ RUN mkdir ${LITEX_INSTALL_PATH} && \
     cd ${LITEX_INSTALL_PATH} && \
     sh /litex_meta.sh
 
-# Install leep from public repo until we have
-# a PyPi home for it
+# Install leep from PyPi
 RUN pip3 install \
-    git+https://github.com/BerkeleyLab/leep.git
+    leep==1.0.0
 
 # Install sv2v
 RUN apt-get update && \

Dockerfile.bedrock_testing_base_trixie

@@ -133,10 +133,9 @@ RUN mkdir ${LITEX_INSTALL_PATH} && \
     cd ${LITEX_INSTALL_PATH} && \
     sh /litex_meta.sh
 
-# Install leep from public repo until we have
-# a PyPi home for it
+# Install leep from PyPi
 RUN pip3 install \
-    git+https://github.com/BerkeleyLab/leep.git
+    leep==1.0.0
 
 # Install sv2v
 RUN apt-get update && \

badger/construct.v

@@ -100,7 +100,7 @@ reg sof_d=0;
 // Would it take fewer resources to replace sof_d with (live && pc_r == 2)?
 // Or to replace (live && pc_r==3) with sof_dd?  Need to measure to find out.
 // Could be worth breaking this up into 2 always blocks (badge and data)?
-// Not really, they both have to touch the "live" register.
+// Not really, since they both have to touch the "live" register.
 always @(posedge clk) begin
 	pc_r <= next_pc;
 	sof_d <= sof;
@@ -185,7 +185,7 @@ assign eth_strobe_short = eth_strobe_short_r;
 assign eth_strobe_long = pack_len_nz && pc_r > 3 && category != 0;
 assign pc = pc_d;
 
-// Debug only, will be dropped if you don't hook up the xcheck_fault port:
+// Debug only; will be dropped if you don't hook up the xcheck_fault port:
 // Cross-check the IP header checksum we just computed
 reg xcheck_zero=0, xcheck_gate=0, xcheck_ones_d=0;
 reg xcheck_capture=0, xcheck_fault_r=0;

badger/rtefi_center.v

@@ -212,9 +212,11 @@ generate if (mac_aw > 1) begin : mac_b
 	.strobe_l(tx_mac_strobe_l)
     );
 end else begin : no_mac_b
+	assign host_raddr = 0;
 	assign tx_mac_strobe_s = 0;
 	assign tx_mac_strobe_l = 0;
 	assign tx_mac_data = 0;
+	assign tx_mac_done = 0;
 end endgenerate
 
 // Slide data from Tx MAC in here

badger/tests/cluster_sim.cpp

@@ -45,7 +45,7 @@ int main(int argc, char** argv, char** env) {
 		Verilated::traceEverOn(true);
 		tfp = new VerilatedVcdC;
 		top->trace(tfp, 8, 0);  // Trace 8 levels of hierarchy
-		tfp->open("Vatb.vcd");
+		tfp->open("cluster_sim.vcd");
 	}
 
 	int cluster_n = 0;  // will be filled in from cluster_n_expose port