-
Notifications
You must be signed in to change notification settings - Fork 14
Description
Reading the datasheet for the AT45DB04D chip it talks about padding the stream with 4 "dont care" bits in between the opcode and the page address:
Main Memory Page Read
A Main Memory Page Read allows the user to read data directly from any one of the 2048 pages in the main memory, bypassing both of the data buffers and leaving the contents of the buffers unchanged.
To start a page read, an opcode of 52H or D2H must be clocked into the device fol-lowed by 24 address bits and 32 don’t care bits.
The first four bits of the 24-bit address sequence are reserved bits, the next 11 address bits (PA10 - PA0) specify the page address,and the next nine address bits (BA8 - BA0) specify the starting byte address within the page.
How are the "first four bits" handled below?
for this chip, m_buffersize comes out to 9, and therefore the inline function pageToHiU8 equates to 16-9 and 16-8 for pageToLoU8.
I'm just a bit confused how we're handling the four empty bits for this 4 megabit chip...
void DataFlash::pageRead(uint16_t page, uint16_t offset)
{
reEnable(); // Reset command decoder.
/* Send opcode */
SPI.transfer(DATAFLASH_PAGE_READ);
/* Address (page | offset) */
SPI.transfer(pageToHiU8(page)); // aka page >> 7
SPI.transfer(pageToLoU8(page) | (uint8_t)(offset >> 8)); // aka page << 1 | offset>>8
SPI.transfer((uint8_t)(offset & 0xff));
/* 4 "don't care" bytes */
SPI.transfer(0);
SPI.transfer(0);
SPI.transfer(0);
SPI.transfer(0);
// Can't disable the chip here!
}