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Commit ca97c39

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author
Nicolas Cornu
authored
Remove dead code (#257)
* Remove dead code put in DEBUG what should be Due to #if 0, if (0 && ...) and #if 1 || * Remove empty function question
1 parent a0ce316 commit ca97c39

18 files changed

+37
-221
lines changed

coreneuron/apps/main1.cpp

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -147,15 +147,6 @@ int corenrn_embedded_run(int nthread, int have_gaps, int use_mpi, int use_fast_i
147147
}
148148
}
149149

150-
#if 0
151-
#include <fenv.h>
152-
#define NRN_FEEXCEPT (FE_DIVBYZERO | FE_INVALID | FE_OVERFLOW)
153-
int nrn_feenableexcept() {
154-
int result = -1;
155-
result = feenableexcept(NRN_FEEXCEPT);
156-
return result;
157-
}
158-
#endif
159150
namespace coreneuron {
160151
void call_prcellstate_for_prcellgid(int prcellgid, int compute_gpu, int is_init);
161152

coreneuron/io/global_vars.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -133,7 +133,7 @@ void set_globals(const char* path, bool cli_global_seed, int cli_global_seed_val
133133
}
134134
}
135135

136-
#if 0
136+
#if DEBUG
137137
for (N2V::iterator i = n2v->begin(); i != n2v->end(); ++i) {
138138
printf("%s %ld %p\n", i->first.c_str(), i->second.first, i->second.second);
139139
}

coreneuron/io/nrn_checkpoint.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -186,10 +186,8 @@ void write_checkpoint(NrnThread* nt, int nb_threads, const char* dir, bool swap_
186186
static void write_phase2(NrnThread& nt, FileHandlerWrap& fh) {
187187
std::ostringstream filename;
188188

189-
#if 1 || CHKPNTDEBUG
190189
NrnThreadChkpnt& ntc = nrnthread_chkpnt[nt.id];
191190
filename << output_dir << "/" << ntc.file_id << "_2.dat";
192-
#endif
193191

194192
fh.open(filename.str().c_str(), swap_bytes, std::ios::out);
195193
fh.checkpoint(2);

coreneuron/io/nrn_setup.cpp

Lines changed: 7 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -702,9 +702,7 @@ void nrn_setup(const char* filesdat,
702702
// Note that rank with 0 dataset/cellgroup works fine
703703
nrn_threads_create(ngroup <= 1 ? 2 : ngroup);
704704

705-
#if 1 || CHKPNTDEBUG // only required for NrnThreadChkpnt.file_id
706705
nrnthread_chkpnt = new NrnThreadChkpnt[nrn_nthread];
707-
#endif
708706

709707
if (nrn_nthread > 1) {
710708
// NetCvode construction assumed one thread. Need nrn_nthread instances
@@ -849,9 +847,9 @@ void read_phasegap(FileHandler& F, int imult, NrnThread& nt) {
849847

850848
F.checkpoint(chkpntsave);
851849

852-
#if 0
850+
#if DEBUG
853851
printf("%d read_phasegap tid=%d type=%d %s ix_vpre=%d nsrc=%d ntar=%d\n",
854-
nrnmpi_myid, nt.id, si.type, memb_func[si.type].sym, si.ix_vpre,
852+
nrnmpi_myid, nt.id, si.type, corenrn.get_memb_func(si.type).sym, si.ix_vpre,
855853
si.nsrc, si.ntar);
856854
for (int i=0; i < si.nsrc; ++i) {
857855
printf("sid_src %d %d\n", si.sid_src[i], si.v_indices[i]);
@@ -1194,10 +1192,8 @@ void read_phase2(FileHandler& F, int imult, NrnThread& nt) {
11941192
assert(!F.fail()); // actually should assert that it is open
11951193
}
11961194
nrn_assert(imult >= 0); // avoid imult unused warning
1197-
#if 1 || CHKPNTDEBUG
11981195
NrnThreadChkpnt& ntc = nrnthread_chkpnt[nt.id];
11991196
ntc.file_id = gidgroups_w[nt.id];
1200-
#endif
12011197

12021198
int n_outputgid, ndiam, nmech, *tml_index, *ml_nodecount;
12031199
if (direct) {
@@ -1598,7 +1594,7 @@ void read_phase2(FileHandler& F, int imult, NrnThread& nt) {
15981594
permute_ptr(nt._v_parent_index, nt.end, p);
15991595
node_permute(nt._v_parent_index, nt.end, p);
16001596

1601-
#if 0
1597+
#if DEBUG
16021598
for (int i=0; i < nt.end; ++i) {
16031599
printf("parent[%d] = %d\n", i, nt._v_parent_index[i]);
16041600
}
@@ -2190,9 +2186,9 @@ static size_t memb_list_size(NrnThreadMembList* tml) {
21902186
nbyte += corenrn.get_prop_dparam_size()[tml->index] * tml->ml->nodecount * sizeof(Datum);
21912187
#ifdef DEBUG
21922188
int i = tml->index;
2193-
printf("%s %d psize=%d ppsize=%d cnt=%d nbyte=%ld\n", memb_func[i].sym, i,
2194-
crnrn.get_prop_param_size()[i],
2195-
crnrn.get_prop_dparam_size()[i], tml->ml->nodecount, nbyte);
2189+
printf("%s %d psize=%d ppsize=%d cnt=%d nbyte=%ld\n", corenrn.get_memb_func(i).sym, i,
2190+
corenrn.get_prop_param_size()[i],
2191+
corenrn.get_prop_dparam_size()[i], tml->ml->nodecount, nbyte);
21962192
#endif
21972193
return nbyte;
21982194
}
@@ -2217,7 +2213,7 @@ size_t input_presyn_size(void) {
22172213
size_t nbyte =
22182214
sizeof(gid2in) + sizeof(int) * gid2in.size() + sizeof(InputPreSyn*) * gid2in.size();
22192215
#ifdef DEBUG
2220-
printf(" gid2in table bytes=~%ld size=%d\n", nbyte, gid2in->size());
2216+
printf(" gid2in table bytes=~%ld size=%d\n", nbyte, gid2in.size());
22212217
#endif
22222218
return nbyte;
22232219
}

coreneuron/mechanism/mech/mod2c_core_thread.hpp

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -25,16 +25,6 @@ namespace coreneuron {
2525
int _iml, int _cntml_padded, double *_p, Datum *_ppvar, ThreadDatum *_thread, NrnThread *_nt, \
2626
double _v
2727

28-
#if 0
29-
30-
typedef int (*DIFUN)(_threadargsproto_);
31-
typedef int (*NEWTFUN)(_threadargsproto_);
32-
typedef int (*SPFUN)(struct SparseObj*, double*, _threadargsproto_);
33-
#define difun(arg) (*arg)(_threadargs_);
34-
#define newtfun(arg) (*arg)(_threadargs_);
35-
36-
#else
37-
3828
/**
3929
* \todo: typedefs like DIFUN can be removed
4030
* \todo: macros for difun, newtfun, eulerfun are not necessary
@@ -55,8 +45,6 @@ extern int nrn_newton_steer(int, _threadargsproto_);
5545
extern int nrn_euler_steer(int, _threadargsproto_);
5646
#define eulerfun(arg) nrn_euler_steer(arg, _threadargs_);
5747

58-
#endif
59-
6048
typedef struct Elm {
6149
unsigned row; /* Row location */
6250
unsigned col; /* Column location */

coreneuron/mechanism/register_mech.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -194,8 +194,8 @@ void nrn_writes_conc(int type, int /* unused */) {
194194
if (type == -1)
195195
return;
196196

197-
#if 0
198-
printf("%s reordered from %d to %d\n", memb_func[type].sym->name, type, lastion);
197+
#if DEBUG
198+
printf("%s reordered from %d to %d\n", corenrn.get_memb_func(type).sym, type, lastion);
199199
#endif
200200
if (nrn_is_ion(type)) {
201201
++lastion;
@@ -270,7 +270,7 @@ void hoc_register_dparam_semantics(int type, int ix, const char* name) {
270270
ion_write_depend(type, etype);
271271
}
272272
}
273-
#if 0
273+
#if DEBUG
274274
printf("dparam semantics %s ix=%d %s %d\n", memb_func[type].sym,
275275
ix, name, memb_func[type].dparam_semantics[ix]);
276276
#endif

coreneuron/network/multisend.cpp

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -368,18 +368,10 @@ void nrn_multisend_receive(NrnThread* nt) {
368368
int ncons = 0;
369369
int& s = multisend_receive_buffer[current_rbuf]->nsend_;
370370
int& r = multisend_receive_buffer[current_rbuf]->nrecv_;
371-
#if 0 && ENQUEUE == 2
372-
unsigned long tfind, tsend;
373-
#endif
374371
// w1 = nrn_wtime();
375372
#if NRN_MULTISEND & 1
376373
if (use_multisend_) {
377374
nrn_multisend_advance();
378-
#if 0 && ENQUEUE == 2
379-
// want the overlap with computation, not conserve
380-
tfind = enq2_find_time_;
381-
tsend = enq2_enqueue_time_ - enq2_find_time_;
382-
#endif
383375
nrnmpi_barrier();
384376
nrn_multisend_advance();
385377
// with two phase we expect conservation to hold and ncons should

coreneuron/network/multisend_setup.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ namespace coreneuron {
2121
typedef std::map<int, InputPreSyn*> Gid2IPS;
2222
typedef std::map<int, PreSyn*> Gid2PS;
2323

24-
#if 0
24+
#if DEBUG
2525
template <typename T>
2626
static void celldebug(const char* p, T& map) {
2727
FILE* f;
@@ -72,7 +72,7 @@ static void alltoalldebug(const char*, int*, int*, int*, int*, int*, int*) {
7272
}
7373
#endif
7474

75-
#if 0
75+
#if DEBUG
7676
void phase1debug(int* targets_phase1) {
7777
FILE* f;
7878
char fname[100];

coreneuron/network/partrans_setup.cpp

Lines changed: 2 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -144,7 +144,7 @@ void nrn_partrans::gap_mpi_setup(int ngroup) {
144144
assert(tar2data.find(sgid) != tar2data.end());
145145
}
146146

147-
#if 0
147+
#if DEBUG
148148
printf("%d mpi outsrccnt_, outsrcdspl_, insrccnt, insrcdspl_\n", nrnmpi_myid);
149149
for (int i = 0; i < nrnmpi_numprocs; ++i) {
150150
printf("%d : %d %d %d %d\n", nrnmpi_myid, outsrccnt_[i], outsrcdspl_[i],
@@ -210,7 +210,7 @@ void nrn_partrans::gap_mpi_setup(int ngroup) {
210210
}
211211
}
212212

213-
#if 0
213+
#if DEBUG
214214
// things look ok so far?
215215
for (int tid=0; tid < ngroup; ++tid) {
216216
nrn_partrans::SetupInfo& si = setup_info_[tid];
@@ -253,15 +253,6 @@ void nrn_partrans::gap_thread_setup(NrnThread& nt) {
253253
} else {
254254
ttd.halfgap_ml = nullptr;
255255
}
256-
#if 0
257-
int ntar = ttd.halfgap_ml->nodecount;
258-
assert(ntar == ttd.ntar);
259-
int sz =halfgap_info->sz;
260-
261-
for (int i=0; i < ntar; ++i) {
262-
ttd.insrc_indices[i] += sz;
263-
}
264-
#endif
265256
}
266257

267258
void nrn_partrans::gap_indices_permute(NrnThread& nt) {

coreneuron/permute/balance.cpp

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -64,13 +64,6 @@ size_t warp_balance(size_t ncell, VecTNode& nodevec) {
6464
}
6565
}
6666

67-
#if 0
68-
size_t ncore = nwarp * warpsize;
69-
size_t cells_per_type = ncell/(typedispl.size() - 1);
70-
size_t ideal_ncycle = total_compart/ncore;
71-
size_t avg_cells_per_warp = total_compart/(ncell*nwarp);
72-
#endif
73-
7467
size_t ideal_compart_per_warp = total_compart / nwarp;
7568

7669
size_t min_cells_per_warp = 0;

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