Skip to content

Commit 8cae48c

Browse files
MCUdudeMCUdude
committed
Fix SPI mapping
Make use of SPI3 on PA15, PB3, PB4 and PB5. This will make the generic F4 pinouts more similar, so it will be easier to migrate fron one chip to another without beaking code changes due to the pin mapping
1 parent 1043594 commit 8cae48c

File tree

6 files changed

+28
-28
lines changed

6 files changed

+28
-28
lines changed

‎variants/Generic_F401Cx/variant.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -40,14 +40,14 @@ extern "C" {
4040
#define PA12 12 // | 12 | | USART6_RX | | | |
4141
#define PA13 13 // | 13 | | | | | SWD_SWDIO |
4242
#define PA14 14 // | 14 | | | | | SWD_SWCLK |
43-
#define PA15 15 // | 15 | | | | SPI1_SS, (SPI3_SS) | |
43+
#define PA15 15 // | 15 | | | | SPI3_SS, (SPI1_SS) | |
4444
// |---------|--------|-----------|----------|------------------------|-----------|
4545
#define PB0 A8 // | 16 | A8 | | | | |
4646
#define PB1 A9 // | 17 | A9 | | | | |
4747
#define PB2 18 // | 18 | | | | | BOOT1 |
48-
#define PB3 19 // | 19 | | | TWI2_SDA | SPI1_SCK, (SPI3_SCK) | |
49-
#define PB4 20 // | 20 | | | TWI3_SDA | SPI1_MISO, (SPI3_MISO) | |
50-
#define PB5 21 // | 21 | | | | SPI1_MOSI, (SPI3_MOSI) | |
48+
#define PB3 19 // | 19 | | | TWI2_SDA | SPI3_SCK, (SPI1_SCK) | |
49+
#define PB4 20 // | 20 | | | TWI3_SDA | SPI3_MISO, (SPI1_MISO) | |
50+
#define PB5 21 // | 21 | | | | SPI3_MOSI, (SPI1_MOSI) | |
5151
#define PB6 22 // | 22 | | USART1_TX | TWI1_SCL | | |
5252
#define PB7 23 // | 23 | | USART1_RX | TWI1_SDA | | |
5353
#define PB8 24 // | 24 | | | TWI1_SCL | | |

‎variants/Generic_F401Rx/PeripheralPins.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -179,8 +179,8 @@ WEAK const PinMap PinMap_UART_CTS[] = {
179179
#ifdef HAL_SPI_MODULE_ENABLED
180180
WEAK const PinMap PinMap_SPI_MOSI[] = {
181181
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
182-
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
183-
// {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
182+
// {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
183+
{PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
184184
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
185185
{PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
186186
{PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
@@ -191,8 +191,8 @@ WEAK const PinMap PinMap_SPI_MOSI[] = {
191191
#ifdef HAL_SPI_MODULE_ENABLED
192192
WEAK const PinMap PinMap_SPI_MISO[] = {
193193
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
194-
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
195-
// {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
194+
// {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
195+
{PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
196196
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
197197
{PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
198198
{PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
@@ -203,8 +203,8 @@ WEAK const PinMap PinMap_SPI_MISO[] = {
203203
#ifdef HAL_SPI_MODULE_ENABLED
204204
WEAK const PinMap PinMap_SPI_SCLK[] = {
205205
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
206-
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
207-
// {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
206+
// {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
207+
{PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
208208
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
209209
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
210210
{PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
@@ -216,8 +216,8 @@ WEAK const PinMap PinMap_SPI_SCLK[] = {
216216
WEAK const PinMap PinMap_SPI_SSEL[] = {
217217
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
218218
// {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
219-
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
220-
// {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
219+
// {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
220+
{PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
221221
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
222222
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
223223
{NC, NP, 0}

‎variants/Generic_F401Rx/variant.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -41,14 +41,14 @@ extern "C" {
4141
#define PA12 12 // | 12 | | USART6_RX | | | |
4242
#define PA13 13 // | 13 | | | | | SWD_SWDIO |
4343
#define PA14 14 // | 14 | | | | | SWD_SWCLK |
44-
#define PA15 15 // | 15 | | | | SPI1_SS, (SPI3_SS) | |
44+
#define PA15 15 // | 15 | | | | SPI3_SS, (SPI1_SS) | |
4545
// |---------|--------|-----------|----------|------------------------|-----------|
4646
#define PB0 A8 // | 16 | A8 | | | | |
4747
#define PB1 A9 // | 17 | A9 | | | | |
4848
#define PB2 18 // | 18 | | | | | BOOT1 |
49-
#define PB3 19 // | 19 | | | TWI2_SDA | SPI1_SCK, (SPI3_SCK) | |
50-
#define PB4 20 // | 20 | | | TWI3_SDA | SPI1_MISO, (SPI3_MISO) | |
51-
#define PB5 21 // | 21 | | | | SPI1_MOSI, (SPI3_MOSI) | |
49+
#define PB3 19 // | 19 | | | TWI2_SDA | SPI3_SCK, (SPI1_SCK) | |
50+
#define PB4 20 // | 20 | | | TWI3_SDA | SPI3_MISO, (SPI1_MISO) | |
51+
#define PB5 21 // | 21 | | | | SPI3_MOSI, (SPI1_MOSI) | |
5252
#define PB6 22 // | 22 | | USART1_TX | TWI1_SCL | | |
5353
#define PB7 23 // | 23 | | USART1_RX | TWI1_SDA | | |
5454
#define PB8 24 // | 24 | | | TWI1_SCL | | |

‎variants/Generic_F411Cx/variant.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -45,9 +45,9 @@ extern "C" {
4545
#define PB0 A8 // | 16 | A8 | | | SPI5_SCK | |
4646
#define PB1 A9 // | 17 | A9 | | | SPI5_SS | |
4747
#define PB2 18 // | 18 | | | | | BOOT1 |
48-
#define PB3 19 // | 19 | | USART1_RX | TWI2_SDA | SPI1_SCK, (SPI3_SCK) | |
49-
#define PB4 20 // | 20 | | | TWI3_SDA | SPI1_MISO, (SPI3_MISO) | |
50-
#define PB5 21 // | 21 | | | | SPI1_MOSI, (SPI3_MOSI) | |
48+
#define PB3 19 // | 19 | | USART1_RX | TWI2_SDA | SPI3_SCK, (SPI1_SCK) | |
49+
#define PB4 20 // | 20 | | | TWI3_SDA | SPI3_MISO, (SPI1_MISO) | |
50+
#define PB5 21 // | 21 | | | | SPI3_MOSI, (SPI1_MOSI) | |
5151
#define PB6 22 // | 22 | | USART1_TX | TWI1_SCL | | |
5252
#define PB7 23 // | 23 | | USART1_RX | TWI1_SDA | | |
5353
#define PB8 24 // | 24 | | | TWI1_SCL, (TWI3_SDA) | SPI5_MOSI | |

‎variants/Generic_F411Rx/PeripheralPins.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -168,8 +168,8 @@ WEAK const PinMap PinMap_SPI_MOSI[] = {
168168
{PA_1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
169169
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
170170
{PA_10, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
171-
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
172-
// {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
171+
// {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
172+
{PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
173173
{PB_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
174174
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
175175
{PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
@@ -183,8 +183,8 @@ WEAK const PinMap PinMap_SPI_MISO[] = {
183183
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
184184
{PA_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)},
185185
{PA_12, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
186-
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
187-
// {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
186+
// {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
187+
{PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
188188
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
189189
{PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
190190
{PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
@@ -196,8 +196,8 @@ WEAK const PinMap PinMap_SPI_MISO[] = {
196196
WEAK const PinMap PinMap_SPI_SCLK[] = {
197197
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
198198
{PB_0, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
199-
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
200-
// {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
199+
// {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
200+
{PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
201201
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
202202
{PB_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
203203
// {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},

‎variants/Generic_F411Rx/variant.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -46,9 +46,9 @@ extern "C" {
4646
#define PB0 A8 // | 16 | A8 | | | SPI5_SCK | |
4747
#define PB1 A9 // | 17 | A9 | | | SPI5_SS | |
4848
#define PB2 18 // | 18 | | | | | BOOT1 |
49-
#define PB3 19 // | 19 | | USART1_RX | TWI2_SDA | SPI1_SCK, (SPI3_SCK) | |
50-
#define PB4 20 // | 20 | | | TWI3_SDA | SPI1_MISO, (SPI3_MISO) | |
51-
#define PB5 21 // | 21 | | | | SPI1_MOSI, (SPI3_MOSI) | |
49+
#define PB3 19 // | 19 | | USART1_RX | TWI2_SDA | SPI3_SCK, (SPI1_SCK) | |
50+
#define PB4 20 // | 20 | | | TWI3_SDA | SPI3_MISO, (SPI1_MISO) | |
51+
#define PB5 21 // | 21 | | | | SPI3_MOSI, (SPI1_MOSI) | |
5252
#define PB6 22 // | 22 | | USART1_TX | TWI1_SCL | | |
5353
#define PB7 23 // | 23 | | USART1_RX | TWI1_SDA | | |
5454
#define PB8 24 // | 24 | | | TWI1_SCL, (TWI3_SDA) | SPI5_MOSI | |

0 commit comments

Comments
 (0)