Multiple screens

[pipikupi]

Hi I would like to use tft_espi lib to build a fake nixie clock. The problem is when have to work with 6 screens. IMG_20231017_014432.jpg

Used to work with 2 screens with switching CS pin by sketch but not sure how to deal with 6 screens.

[Bodmer]

Use the same approach with 6 CS pins, one for each display.

[pipikupi]

Hi really appreciated for very fast response. I was away for few days but did some check and it works very fine but became other issue. My sketch is very simple 1000ms loop for time to keep nice looking 6 digit clock and 10 jpg pics stored in spiffs which are displayed one on each displays and sum of the times for working with screens is around 900-1050ms which is causing displaying properly images because refreshing time sometimes is longer than time loop. Would you recommend me any solution for that case to reduce screens fefreshing time. Will be very appreciated for any advice. Thanks Pit

[pipikupi]

Hi finally have lcds arrived but I'm not able to work with more than 2 displays the same time. Was reading in the past that CS switching work just for 2 displays but not sure why

[pipikupi]

That's why I'm confused. Unfortunately haven't got an oscilloscope. But will make a new board because current one night be to everything to close and it can interfere.
Thank you for your support

[pipikupi]

Hi asking just in case because use another esp32 made new clear boards and it is the same spi 10MHz nothing 40Mhz nothing 80 MHz something. So to change SPI speed I need to edit User setup line

#define SPI_FREQUENCY 40000000

For example

#define SPI_FREQUENCY 10000000

I know it probably is silly question

[Bodmer]

Ribbon cables do create a lot of crosstalk between the signals. I suspect this is a signal integrity problem that just happens to work with 80MHz. You may find that 47R resistors inline with the signal at the ESP32 ( i.e GPIO -> resistor -> dislplay) will kill the reflections but you will have to reduce the speed due to the slower edge speeds. You may find the critical SPI clock line is the only one that needs this treatment and maybe the MOSI line. Seperating out the wires in the ribbon to reduce capacitance between them may also help.

[Bodmer]

You could also try reducing the drive strength of the SPI clock and MOSI lines, see here.

[pipikupi]

Thanks for advice I will test resistors inline and reducing the drive strenght for signal lines at the weekend time. About the ribbons I used to work with radio frequency converters at 144-146MHz and 430-440MHz as a hobby and during that time I've learned to use double lines ribbons and mix it like signal-ground-signal-ground etc to reduce crosstalk for lenght of ribbon up to 10cm and over that just use screened wires for signal lines. So for example for 4 SPI lines I use 10 lines ribbon