core: also use model to determine which revs are appropriate.

adriweb · adriweb · commit 5981f30ac58a · 2025-06-14T19:10:33.000+02:00
This is needed for proper 82AEP support which is M+ only (pre-A there).
The model info is stored in the asic state, hence the IMAGE_VERSION inc.
diff --git a/core/asic.c b/core/asic.c
@@ -88,7 +88,7 @@ static void plug_devices(void) {
     gui_console_printf("[CEmu] Initialized Advanced Peripheral Bus...\n");
 }
 
-static asic_rev_t report_reset(asic_rev_t loaded_rev, bool* python) {
+static asic_rev_t report_reset(asic_rev_t loaded_rev, ti_model_t model, bool* python) {
     /* Parse boot code routines to determine version. */
     asic_rev_t default_rev = ASIC_REV_A;
     boot_ver_t boot_ver;
@@ -99,7 +99,7 @@ static asic_rev_t report_reset(asic_rev_t loaded_rev, bool* python) {
 
         /* Determine the newest ASIC revision that is compatible */
         for (int rev = ASIC_REV_A; rev <= ASIC_REV_M; rev++) {
-            if (bootver_check_rev(&boot_ver, (asic_rev_t)rev)) {
+            if (bootver_check_rev(&boot_ver, (asic_rev_t)rev, model)) {
                 default_rev = rev;
             }
         }
@@ -114,13 +114,14 @@ static asic_rev_t report_reset(asic_rev_t loaded_rev, bool* python) {
     }
     gui_console_printf("[CEmu] Default ASIC revision is Rev %c.\n", "AIM"[(int)default_rev - 1]);
 
-    loaded_rev = gui_handle_reset((gotVer ? &boot_ver : NULL), loaded_rev, default_rev, python);
+    loaded_rev = gui_handle_reset((gotVer ? &boot_ver : NULL), loaded_rev, default_rev, model, python);
     return (loaded_rev != ASIC_REV_AUTO) ? loaded_rev : default_rev;
 }
 
 static void set_features() {
     asic.im2 = (asic.revision < ASIC_REV_I);
     asic.serFlash = (asic.revision >= ASIC_REV_M);
+    asic.hasWorkingSPIReads = (asic.model == TIMODEL_82AEP && asic.revision >= ASIC_REV_M);
 }
 
 void asic_init(void) {
@@ -148,14 +149,22 @@ void asic_reset(void) {
     /* Update the Python state first, so it can be read by the reset handler if needed */
     static const uint16_t path[] = { 0x0330, 0x0430 };
     asic.python = !cert_field_find_path(mem.flash.block + 0x3B0001, SIZE_FLASH_SECTOR_64K, path, 2, NULL, NULL);
-    asic.revision = report_reset(ASIC_REV_AUTO, &asic.python);
+    asic.revision = report_reset(ASIC_REV_AUTO, asic.model, &asic.python);
     set_features();
 
     for (unsigned int i = 0; i < reset_proc_count; i++) {
         reset_procs[i]();
     }
 }
 
+void set_model_type(ti_model_t model) {
+    asic.model = model;
+}
+
+ti_model_t EMSCRIPTEN_KEEPALIVE get_model_type(void) {
+    return asic.model;
+}
+
 void set_device_type(ti_device_t device) {
     asic.device = device;
 }
@@ -203,7 +212,7 @@ bool asic_restore(FILE *image) {
      && fgetc(image) == EOF)
     {
         bool python = asic.python;
-        (void)report_reset(asic.revision, &python);
+        (void)report_reset(asic.revision, asic.model, &python);
         return true;
     }
     return false;
diff --git a/core/asic.h b/core/asic.h
@@ -11,7 +11,7 @@ extern "C" {
 
 typedef enum {
     TI84PCE = 0,
-    TI83PCE = 1
+    TI83PCE = 1 /* also in use by the TI-82AEP model */
 } ti_device_t;
 
 typedef enum {
@@ -27,13 +27,15 @@ typedef enum {
 } asic_rev_t;
 
 typedef struct asic_state {
+    ti_model_t model;
     ti_device_t device;
     /* Only updated on reset */
     asic_rev_t revision;
     bool python;
     /* Populated based on revision */
     bool im2;
     bool serFlash;
+    bool hasWorkingSPIReads;
 } asic_state_t;
 
 extern asic_state_t asic;
@@ -44,6 +46,8 @@ void asic_reset(void);
 bool asic_restore(FILE *image);
 bool asic_save(FILE *image);
 void set_cpu_clock(uint32_t new_rate);
+void set_model_type(ti_model_t model);
+ti_model_t get_model_type(void);
 void set_device_type(ti_device_t device);
 ti_device_t get_device_type(void);
 asic_rev_t get_asic_revision(void);
diff --git a/core/bootver.c b/core/bootver.c
@@ -1,16 +1,18 @@
 #include "bootver.h"
 
-static const boot_ver_t asic_min_ver[] = {
-    { 5, 0, 0, 0 }, /* Rev A */
-    { 5, 0, 0, 0 }, /* Rev I */
-    { 5, 3, 6, 0 }, /* Rev M */
-};
-
-static const boot_ver_t asic_max_ver[] = {
-    {   5,   3,   5, 65535 }, /* Rev A */
-    {   5,   3,   5, 65535 }, /* Rev I */
-    { 255, 255, 255, 65535 }, /* Rev M */
-};
+static const boot_ver_t minRevA_CE = {   5,   0,   0,     0 }; /* Rev A */
+static const boot_ver_t minRevI_CE = {   5,   0,   0,     0 }; /* Rev I */
+static const boot_ver_t minRevM_CE = {   5,   3,   6,     0 }; /* Rev M */
+static const boot_ver_t minRevM_82 = {   5,   6,   3,     0 }; /* Rev pre-A of 82AEP, but otherwise the same JB-007 ASIC as M on CE */
+static const boot_ver_t maxRevA_CE = {   5,   3,   5, 65535 }; /* Rev A */
+static const boot_ver_t maxRevI_CE = {   5,   3,   5, 65535 }; /* Rev I */
+static const boot_ver_t maxRev     = { 255, 255, 255, 65535 }; /* Rev M */
+
+/* NULL means unsupported */
+static const boot_ver_t* asic_min_ver_8384CE[] = { &minRevA_CE, &minRevI_CE, &minRevM_CE };
+static const boot_ver_t* asic_max_ver_8384CE[] = { &maxRevA_CE, &maxRevI_CE, &maxRev };
+static const boot_ver_t* asic_min_ver_82AEP[]  = { NULL,        NULL,        &minRevM_82 };
+static const boot_ver_t* asic_max_ver_82AEP[]  = { NULL,        NULL,        &maxRev };
 
 static bool parse_entry(const uint8_t* data, uint32_t entry, uint32_t* addr) {
     if (entry + 4 >= SIZE_BOOTCODE) {
@@ -98,6 +100,9 @@ bool bootver_parse(const uint8_t* data, boot_ver_t* boot_ver) {
 }
 
 bool bootver_check_ver(const boot_ver_t* ver, const boot_ver_t* check) {
+    if (!ver || !check) {
+        return false;
+    }
     if (ver->major != check->major) {
         return ver->major > check->major;
     }
@@ -110,16 +115,19 @@ bool bootver_check_ver(const boot_ver_t* ver, const boot_ver_t* check) {
     return ver->build >= check->build;
 }
 
-bool bootver_check_rev(const boot_ver_t* ver, asic_rev_t rev) {
+bool bootver_check_rev(const boot_ver_t* ver, asic_rev_t rev, ti_model_t model) {
     unsigned int index = (unsigned int)rev - 1;
-    if (index >= sizeof(asic_min_ver) / sizeof(boot_ver_t)) {
+    if ((model == TIMODEL_8384CE && index >= sizeof(asic_min_ver_8384CE) / sizeof(boot_ver_t*)) ||
+        (model == TIMODEL_82AEP  && index >= sizeof(asic_min_ver_82AEP)  / sizeof(boot_ver_t*))) {
         return false;
     }
 
     if (!ver) {
         return true;
     }
 
-    return bootver_check_ver(ver, asic_min_ver + index)
-        && bootver_check_ver(asic_max_ver + index, ver);
+    const boot_ver_t** asic_min_ver = (model == TIMODEL_8384CE) ? asic_min_ver_8384CE : asic_min_ver_82AEP;
+    const boot_ver_t** asic_max_ver = (model == TIMODEL_8384CE) ? asic_max_ver_8384CE : asic_max_ver_82AEP;
+    return bootver_check_ver(ver, asic_min_ver[index])
+        && bootver_check_ver(asic_max_ver[index], ver);
 }
diff --git a/core/bootver.h b/core/bootver.h
@@ -24,7 +24,7 @@ extern "C" {
 
     bool bootver_check_ver(const boot_ver_t* ver, const boot_ver_t* check);
 
-    bool bootver_check_rev(const boot_ver_t* ver, asic_rev_t rev);
+    bool bootver_check_rev(const boot_ver_t* ver, asic_rev_t rev, ti_model_t model);
 
 #ifdef __cplusplus
 }
diff --git a/core/emu.c b/core/emu.c
@@ -18,7 +18,7 @@
 #include <emscripten.h>
 #endif
 
-#define IMAGE_VERSION 0xCECE001A
+#define IMAGE_VERSION 0xCECE001B
 
 void EMSCRIPTEN_KEEPALIVE emu_exit(void) {
     cpu_set_signal(CPU_SIGNAL_EXIT);
@@ -192,15 +192,21 @@ emu_state_t emu_load(emu_data_t type, const char *path) {
                                    isPython ? "Yes" : "No");
             }
 
+            if ((model_id == TIMODEL_82AEP  && device_type != TI83PCE) ||
+                (model_id == TIMODEL_8384CE && device_type != TI84PCE)) {
+                gui_console_err_printf("[CEmu] Got model<->device discrepency !?\n");
+            }
 
             break;
         }
 
         state = EMU_STATE_VALID;
 
         if (gotType) {
+            set_model_type(model_id);
             set_device_type(device_type);
         } else {
+            set_model_type(TIMODEL_8384CE);
             set_device_type(TI84PCE);
             gui_console_err_printf("[CEmu] Could not determine device device_type.\n");
             state = EMU_STATE_NOT_A_CE;
diff --git a/core/emu.h b/core/emu.h
@@ -45,10 +45,11 @@ void gui_console_err_printf(const char *format, ...);     /* printf from the cor
  *   boot_ver: boot code version if found, else NULL
  *   loaded_rev: ASIC_REV_AUTO on reset, or loaded revision on state load
  *   default_rev: default revision to use when returning ASIC_REV_AUTO
+ *   model: which model (83CE/84CE or 82AEP) we're actually emulating
  *   python: determined edition based on certificate, can be overridden by updating its value
  * returns:
  *   hardware revision to use; ignored when loading state */
-asic_rev_t gui_handle_reset(const boot_ver_t* boot_ver, asic_rev_t loaded_rev, asic_rev_t default_rev, bool* python);
+asic_rev_t gui_handle_reset(const boot_ver_t* boot_ver, asic_rev_t loaded_rev, asic_rev_t default_rev, ti_model_t model, bool* python);
 
 #ifdef DEBUG_SUPPORT
 void gui_debug_open(int reason, uint32_t data);           /* open the gui debugger */
diff --git a/core/spi.c b/core/spi.c
@@ -160,6 +160,7 @@ static void spi_update(void) {
 }
 
 /* Read from the SPI range of ports */
+/* TODO: something with asic.hasWorkingSPIReads probably */
 static uint8_t spi_read(uint16_t addr, bool peek) {
     static const uint16_t cr0_masks[16] = {
         0xF18C, 0xF8EF, 0xF0AC, 0xF3FC, 0xF18C, 0xF4C0, 0xF3AC, 0xF3AC,
diff --git a/gui/qt/emuthread.cpp b/gui/qt/emuthread.cpp
@@ -48,8 +48,8 @@ void gui_debug_close(void) {
     emu->debugDisable();
 }
 
-asic_rev_t gui_handle_reset(const boot_ver_t* boot_ver, asic_rev_t loaded_rev, asic_rev_t default_rev, bool* python) {
-    return emu->handleReset(boot_ver, loaded_rev, default_rev, python);
+asic_rev_t gui_handle_reset(const boot_ver_t* boot_ver, asic_rev_t loaded_rev, asic_rev_t default_rev, ti_model_t model, bool* python) {
+    return emu->handleReset(boot_ver, loaded_rev, default_rev, model, python);
 }
 
 namespace {
@@ -279,12 +279,12 @@ void EmuThread::unblock() {
     m_mutex.unlock();
 }
 
-asic_rev_t EmuThread::handleReset(const boot_ver_t* bootVer, asic_rev_t loadedRev, asic_rev_t defaultRev, bool* python) {
+asic_rev_t EmuThread::handleReset(const boot_ver_t* bootVer, asic_rev_t loadedRev, asic_rev_t defaultRev, ti_model_t model, bool* python) {
     // Build a list of supported revisions
     QList<int> supportedRevs;
     supportedRevs.reserve(ASIC_REV_M - ASIC_REV_A + 1);
     for (int rev = ASIC_REV_A; rev <= ASIC_REV_M; rev++) {
-        if (bootver_check_rev(bootVer, (asic_rev_t)rev)) {
+        if (bootver_check_rev(bootVer, (asic_rev_t)rev, model)) {
             supportedRevs.push_back(rev);
         }
     }
diff --git a/gui/qt/emuthread.h b/gui/qt/emuthread.h
@@ -38,7 +38,7 @@ class EmuThread : public QThread {
     void setAsicRev(int rev);
     void setAllowAnyRev(bool allow);
     void setForcePython(Qt::CheckState state);
-    asic_rev_t handleReset(const boot_ver_t* bootVer, asic_rev_t loadedRev, asic_rev_t defaultRev, bool* python);
+    asic_rev_t handleReset(const boot_ver_t* bootVer, asic_rev_t loadedRev, asic_rev_t defaultRev, ti_model_t model, bool* python);
     void writeConsole(int console, const char *format, va_list args);
     void debugOpen(int reason, uint32_t addr);
     void save(emu_data_t fileType, const QString &filePath);
diff --git a/gui/sdl/main.c b/gui/sdl/main.c
@@ -29,10 +29,11 @@ static int8_t python_rev = -1;
 void gui_console_clear() {}
 void gui_console_printf(const char *format, ...) { (void)format; }
 void gui_console_err_printf(const char *format, ...) { (void)format; }
-asic_rev_t gui_handle_reset(const boot_ver_t* boot_ver, asic_rev_t loaded_rev, asic_rev_t default_rev, bool* python) {
+asic_rev_t gui_handle_reset(const boot_ver_t* boot_ver, asic_rev_t loaded_rev, asic_rev_t default_rev, ti_model_t model, bool* python) {
     (void)boot_ver;
     (void)loaded_rev;
     (void)default_rev;
+    (void)model;
     if (python_rev >= 0) {
         *python = python_rev;
     }
diff --git a/tests/autotester/autotester_cli.cpp b/tests/autotester/autotester_cli.cpp
@@ -40,10 +40,11 @@ namespace cemucore
             }
             va_end(ap);
         }
-        asic_rev_t gui_handle_reset(const boot_ver_t* boot_ver, asic_rev_t loaded_rev, asic_rev_t default_rev, bool* python) {
+        asic_rev_t gui_handle_reset(const boot_ver_t* boot_ver, asic_rev_t loaded_rev, asic_rev_t default_rev, ti_model_t model, bool* python) {
             (void)boot_ver;
             (void)loaded_rev;
             (void)default_rev;
+            (void)model;
             (void)python;
             return ASIC_REV_AUTO;
         }

Original file line number	Diff line number	Diff line change
`@@ -88,7 +88,7 @@ static void plug_devices(void) {`
`88`	`88`	`gui_console_printf("[CEmu] Initialized Advanced Peripheral Bus...\n");`
`89`	`89`	`}`
`90`	`90`
`91`		`-static asic_rev_t report_reset(asic_rev_t loaded_rev, bool* python) {`
	`91`	`+static asic_rev_t report_reset(asic_rev_t loaded_rev, ti_model_t model, bool* python) {`
`92`	`92`	`/* Parse boot code routines to determine version. */`
`93`	`93`	`asic_rev_t default_rev = ASIC_REV_A;`
`94`	`94`	`boot_ver_t boot_ver;`
`@@ -99,7 +99,7 @@ static asic_rev_t report_reset(asic_rev_t loaded_rev, bool* python) {`
`99`	`99`
`100`	`100`	`/* Determine the newest ASIC revision that is compatible */`
`101`	`101`	`for (int rev = ASIC_REV_A; rev <= ASIC_REV_M; rev++) {`
`102`		`- if (bootver_check_rev(&boot_ver, (asic_rev_t)rev)) {`
	`102`	`+ if (bootver_check_rev(&boot_ver, (asic_rev_t)rev, model)) {`
`103`	`103`	`default_rev = rev;`
`104`	`104`	`}`
`105`	`105`	`}`
`@@ -114,13 +114,14 @@ static asic_rev_t report_reset(asic_rev_t loaded_rev, bool* python) {`
`114`	`114`	`}`
`115`	`115`	`gui_console_printf("[CEmu] Default ASIC revision is Rev %c.\n", "AIM"[(int)default_rev - 1]);`
`116`	`116`
`117`		`- loaded_rev = gui_handle_reset((gotVer ? &boot_ver : NULL), loaded_rev, default_rev, python);`
	`117`	`+ loaded_rev = gui_handle_reset((gotVer ? &boot_ver : NULL), loaded_rev, default_rev, model, python);`
`118`	`118`	`return (loaded_rev != ASIC_REV_AUTO) ? loaded_rev : default_rev;`
`119`	`119`	`}`
`120`	`120`
`121`	`121`	`static void set_features() {`
`122`	`122`	`asic.im2 = (asic.revision < ASIC_REV_I);`
`123`	`123`	`asic.serFlash = (asic.revision >= ASIC_REV_M);`
	`124`	`+ asic.hasWorkingSPIReads = (asic.model == TIMODEL_82AEP && asic.revision >= ASIC_REV_M);`
`124`	`125`	`}`
`125`	`126`
`126`	`127`	`void asic_init(void) {`
`@@ -148,14 +149,22 @@ void asic_reset(void) {`
`148`	`149`	`/* Update the Python state first, so it can be read by the reset handler if needed */`
`149`	`150`	`static const uint16_t path[] = { 0x0330, 0x0430 };`
`150`	`151`	`asic.python = !cert_field_find_path(mem.flash.block + 0x3B0001, SIZE_FLASH_SECTOR_64K, path, 2, NULL, NULL);`
`151`		`- asic.revision = report_reset(ASIC_REV_AUTO, &asic.python);`
	`152`	`+ asic.revision = report_reset(ASIC_REV_AUTO, asic.model, &asic.python);`
`152`	`153`	`set_features();`
`153`	`154`
`154`	`155`	`for (unsigned int i = 0; i < reset_proc_count; i++) {`
`155`	`156`	`reset_procs[i]();`
`156`	`157`	`}`
`157`	`158`	`}`
`158`	`159`
	`160`	`+void set_model_type(ti_model_t model) {`
	`161`	`+ asic.model = model;`
	`162`	`+}`
	`163`	`+`
	`164`	`+ti_model_t EMSCRIPTEN_KEEPALIVE get_model_type(void) {`
	`165`	`+ return asic.model;`
	`166`	`+}`
	`167`	`+`
`159`	`168`	`void set_device_type(ti_device_t device) {`
`160`	`169`	`asic.device = device;`
`161`	`170`	`}`
`@@ -203,7 +212,7 @@ bool asic_restore(FILE *image) {`
`203`	`212`	`&& fgetc(image) == EOF)`
`204`	`213`	`{`
`205`	`214`	`bool python = asic.python;`
`206`		`- (void)report_reset(asic.revision, &python);`
	`215`	`+ (void)report_reset(asic.revision, asic.model, &python);`
`207`	`216`	`return true;`
`208`	`217`	`}`
`209`	`218`	`return false;`
Original file line number	Diff line number	Diff line change
`@@ -24,7 +24,7 @@ extern "C" {`
`24`	`24`
`25`	`25`	`bool bootver_check_ver(const boot_ver_t* ver, const boot_ver_t* check);`
`26`	`26`
`27`		`- bool bootver_check_rev(const boot_ver_t* ver, asic_rev_t rev);`
	`27`	`+ bool bootver_check_rev(const boot_ver_t* ver, asic_rev_t rev, ti_model_t model);`
`28`	`28`
`29`	`29`	`#ifdef __cplusplus`
`30`	`30`	`}`
Original file line number	Diff line number	Diff line change
`@@ -160,6 +160,7 @@ static void spi_update(void) {`
`160`	`160`	`}`
`161`	`161`
`162`	`162`	`/* Read from the SPI range of ports */`
	`163`	`+/* TODO: something with asic.hasWorkingSPIReads probably */`
`163`	`164`	`static uint8_t spi_read(uint16_t addr, bool peek) {`
`164`	`165`	`static const uint16_t cr0_masks[16] = {`
`165`	`166`	`0xF18C, 0xF8EF, 0xF0AC, 0xF3FC, 0xF18C, 0xF4C0, 0xF3AC, 0xF3AC,`
Original file line number	Diff line number	Diff line change
`@@ -48,8 +48,8 @@ void gui_debug_close(void) {`
`48`	`48`	`emu->debugDisable();`
`49`	`49`	`}`
`50`	`50`
`51`		`-asic_rev_t gui_handle_reset(const boot_ver_t* boot_ver, asic_rev_t loaded_rev, asic_rev_t default_rev, bool* python) {`
`52`		`- return emu->handleReset(boot_ver, loaded_rev, default_rev, python);`
	`51`	`+asic_rev_t gui_handle_reset(const boot_ver_t* boot_ver, asic_rev_t loaded_rev, asic_rev_t default_rev, ti_model_t model, bool* python) {`
	`52`	`+ return emu->handleReset(boot_ver, loaded_rev, default_rev, model, python);`
`53`	`53`	`}`
`54`	`54`
`55`	`55`	`namespace {`
`@@ -279,12 +279,12 @@ void EmuThread::unblock() {`
`279`	`279`	`m_mutex.unlock();`
`280`	`280`	`}`
`281`	`281`
`282`		`-asic_rev_t EmuThread::handleReset(const boot_ver_t* bootVer, asic_rev_t loadedRev, asic_rev_t defaultRev, bool* python) {`
	`282`	`+asic_rev_t EmuThread::handleReset(const boot_ver_t* bootVer, asic_rev_t loadedRev, asic_rev_t defaultRev, ti_model_t model, bool* python) {`
`283`	`283`	`// Build a list of supported revisions`
`284`	`284`	`QList<int> supportedRevs;`
`285`	`285`	`supportedRevs.reserve(ASIC_REV_M - ASIC_REV_A + 1);`
`286`	`286`	`for (int rev = ASIC_REV_A; rev <= ASIC_REV_M; rev++) {`
`287`		`- if (bootver_check_rev(bootVer, (asic_rev_t)rev)) {`
	`287`	`+ if (bootver_check_rev(bootVer, (asic_rev_t)rev, model)) {`
`288`	`288`	`supportedRevs.push_back(rev);`
`289`	`289`	`}`
`290`	`290`	`}`