1- #ifdef DEBUG_SUPPORT
2-
31#ifndef DEBUG_H
42#define DEBUG_H
53
@@ -128,6 +126,7 @@ bool debug_get_executing_basic_prgm(char *name);
128126#define DBG_BASIC_CMDEXEC_BIT (1 << 6)
129127#define DBG_BASIC_PROGEXECUTING_BIT (1 << 1)
130128
129+ #ifdef DEBUG_SUPPORT
131130typedef struct {
132131 bool mode : 1 ;
133132 bool popped : 1 ;
@@ -188,6 +187,7 @@ enum {
188187void debug_step_switch (void );
189188void debug_clear_step (void );
190189void debug_clear_basic_step (void );
190+ #endif
191191
192192/* register watchpoints */
193193/* these ids correspond to logical CPU registers shown in the UI */
@@ -231,6 +231,7 @@ typedef enum {
231231 DBG_REG_COUNT
232232} dbg_reg_t ;
233233
234+ #ifdef DEBUG_SUPPORT
234235/* enable/disable register watch for a given id and mask (DBG_MASK_READ/WRITE) */
235236void debug_reg_watch (unsigned regID , int mask , bool set );
236237/* get current mask (DBG_MASK_READ/WRITE) for a register id */
@@ -240,7 +241,35 @@ void debug_touch_reg_read(unsigned regID);
240241void debug_touch_reg_write (unsigned regID , uint32_t oldValue , uint32_t new_value );
241242/* normalize a register value to its natural width (8/16/24) */
242243uint32_t debug_norm_reg_value (unsigned regID , uint32_t value );
244+ #else
245+ static inline void debug_reg_watch (unsigned regID , int mask , bool set ) {
246+ (void )regID ;
247+ (void )mask ;
248+ (void )set ;
249+ }
250+
251+ static inline int debug_reg_get_mask (unsigned regID ) {
252+ (void )regID ;
253+ return 0 ;
254+ }
255+
256+ static inline void debug_touch_reg_read (unsigned regID ) {
257+ (void )regID ;
258+ }
259+
260+ static inline void debug_touch_reg_write (unsigned regID , uint32_t oldValue , uint32_t new_value ) {
261+ (void )regID ;
262+ (void )oldValue ;
263+ (void )new_value ;
264+ }
265+
266+ static inline uint32_t debug_norm_reg_value (unsigned regID , uint32_t value ) {
267+ (void )regID ;
268+ return value ;
269+ }
270+ #endif
243271
272+ #ifdef DEBUG_SUPPORT
244273/* direct touch helper for write only sites */
245274#define DBG_REG_TOUCH_W (ID , OLD , NEW ) \
246275 do { debug_touch_reg_write((unsigned)(ID), (uint32_t)(OLD), (uint32_t)(NEW)); } while (0)
@@ -263,6 +292,27 @@ uint32_t debug_norm_reg_value(unsigned regID, uint32_t value);
263292 debug_touch_reg_write((unsigned)(ID), __old, __new); \
264293 (LVAL) = (__new); \
265294 }))
295+ #else
296+ #define DBG_REG_TOUCH_W (ID , OLD , NEW ) \
297+ do { \
298+ (void)(ID); \
299+ (void)(OLD); \
300+ (void)(NEW); \
301+ } while (0)
302+
303+ #define REG_READ_EX (ID , EXPR ) \
304+ (__extension__({ \
305+ (void)(ID); \
306+ (uint32_t)(EXPR); \
307+ }))
308+
309+ #define REG_WRITE_EX (ID , LVAL , VAL ) \
310+ (__extension__({ \
311+ (void)(ID); \
312+ uint32_t __new = (uint32_t)(VAL); \
313+ (LVAL) = (__new); \
314+ }))
315+ #endif
266316
267317/* map CPU context to register IDs */
268318/* eZ80 PREFIX: 0 = HL, 2 = IX, 3 = IY */
@@ -277,5 +327,3 @@ uint32_t debug_norm_reg_value(unsigned regID, uint32_t value);
277327#endif
278328
279329#endif
280-
281- #endif
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