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lines changed Original file line number Diff line number Diff line change 6262 "start" : " vram_start" ,
6363 "size" : " vram_16_size" ,
6464 "expected_CRCs" : [
65- " 0B3D9374 "
65+ " B9510AD8 "
6666 ]
6767 },
6868 "neg" : {
6969 "description" : " neg" ,
7070 "start" : " vram_start" ,
7171 "size" : " vram_16_size" ,
7272 "expected_CRCs" : [
73- " 10A84E1B "
73+ " 7122851F "
7474 ]
7575 },
7676 "abs" : {
7777 "description" : " abs" ,
7878 "start" : " vram_start" ,
7979 "size" : " vram_16_size" ,
8080 "expected_CRCs" : [
81- " D7807035 "
81+ " 7614EAC3 "
8282 ]
8383 },
8484 "bitrev" : {
8585 "description" : " bitrev" ,
8686 "start" : " vram_start" ,
8787 "size" : " vram_16_size" ,
8888 "expected_CRCs" : [
89- " BBADF82E "
89+ " 1492AAC4 "
9090 ]
9191 },
9292 "bswap" : {
9393 "description" : " bswap" ,
9494 "start" : " vram_start" ,
9595 "size" : " vram_16_size" ,
9696 "expected_CRCs" : [
97- " 7709B5AE "
97+ " C9C416BB "
9898 ]
9999 },
100100 "popcnt" : {
101101 "description" : " popcnt" ,
102102 "start" : " vram_start" ,
103103 "size" : " vram_16_size" ,
104104 "expected_CRCs" : [
105- " 62628040 "
105+ " E3E46F91 "
106106 ]
107107 },
108108 "and" : {
109109 "description" : " and" ,
110110 "start" : " vram_start" ,
111111 "size" : " vram_16_size" ,
112112 "expected_CRCs" : [
113- " 32DEF9D5 "
113+ " 844F62ED "
114114 ]
115115 },
116116 "or" : {
117117 "description" : " or" ,
118118 "start" : " vram_start" ,
119119 "size" : " vram_16_size" ,
120120 "expected_CRCs" : [
121- " 4E247920 "
121+ " 6529AA0B "
122122 ]
123123 },
124124 "xor" : {
125125 "description" : " xor" ,
126126 "start" : " vram_start" ,
127127 "size" : " vram_16_size" ,
128128 "expected_CRCs" : [
129- " 257F7002 "
129+ " 2CAD0372 "
130130 ]
131131 },
132132 "add" : {
133133 "description" : " add" ,
134134 "start" : " vram_start" ,
135135 "size" : " vram_16_size" ,
136136 "expected_CRCs" : [
137- " CD575A4D "
137+ " F94DD5D6 "
138138 ]
139139 },
140140 "sub" : {
141141 "description" : " sub" ,
142142 "start" : " vram_start" ,
143143 "size" : " vram_16_size" ,
144144 "expected_CRCs" : [
145- " EE1C5453 "
145+ " 167FF1A7 "
146146 ]
147147 },
148148 "shl" : {
149149 "description" : " shl" ,
150150 "start" : " vram_start" ,
151151 "size" : " vram_16_size" ,
152152 "expected_CRCs" : [
153- " FD8CA2EC "
153+ " BF87D382 "
154154 ]
155155 },
156156 "shru" : {
157157 "description" : " shru" ,
158158 "start" : " vram_start" ,
159159 "size" : " vram_16_size" ,
160160 "expected_CRCs" : [
161- " 9754CB4F "
161+ " 0F7AE868 "
162162 ]
163163 },
164164 "shrs" : {
165165 "description" : " shrs" ,
166166 "start" : " vram_start" ,
167167 "size" : " vram_16_size" ,
168168 "expected_CRCs" : [
169- " AB5BE5CB "
169+ " A0BA88A7 "
170170 ]
171171 },
172172 "mulu" : {
173173 "description" : " mulu" ,
174174 "start" : " vram_start" ,
175175 "size" : " vram_16_size" ,
176176 "expected_CRCs" : [
177- " C6A6FF7D "
177+ " B7CBA439 "
178178 ]
179179 },
180180 "divu" : {
181181 "description" : " divu" ,
182182 "start" : " vram_start" ,
183183 "size" : " vram_16_size" ,
184184 "expected_CRCs" : [
185- " F973C020 "
185+ " 1AC569AB "
186186 ]
187187 },
188188 "remu" : {
189189 "description" : " remu" ,
190190 "start" : " vram_start" ,
191191 "size" : " vram_16_size" ,
192192 "expected_CRCs" : [
193- " 5196C205 "
193+ " D29F5374 "
194194 ]
195195 },
196196 "divs" : {
197197 "description" : " divs" ,
198198 "start" : " vram_start" ,
199199 "size" : " vram_16_size" ,
200200 "expected_CRCs" : [
201- " 2A13A348 "
201+ " 63331417 "
202202 ]
203203 },
204204 "rems" : {
205205 "description" : " rems" ,
206206 "start" : " vram_start" ,
207207 "size" : " vram_16_size" ,
208208 "expected_CRCs" : [
209- " F45969EF "
209+ " 1322808B "
210210 ]
211211 },
212212 "div_q" : {
213213 "description" : " div_q" ,
214214 "start" : " vram_start" ,
215215 "size" : " vram_16_size" ,
216216 "expected_CRCs" : [
217- " EAFFC6D3 "
217+ " B5F9B54D "
218218 ]
219219 },
220220 "div_r" : {
221221 "description" : " div_r" ,
222222 "start" : " vram_start" ,
223223 "size" : " vram_16_size" ,
224224 "expected_CRCs" : [
225- " B9786654 "
225+ " 60B1E228 "
226226 ]
227227 },
228228 "done" : {
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