1+ /* *
2+ * \file
3+ * \brief Compatible definitions for DPDK versions.
4+ * \author Pavel Siska <[email protected] > 5+ * \date 2024
6+ */
7+ /*
8+ * Copyright (C) 2024 CESNET
9+ *
10+ * LICENSE TERMS
11+ *
12+ * Redistribution and use in source and binary forms, with or without
13+ * modification, are permitted provided that the following conditions
14+ * are met:
15+ * 1. Redistributions of source code must retain the above copyright
16+ * notice, this list of conditions and the following disclaimer.
17+ * 2. Redistributions in binary form must reproduce the above copyright
18+ * notice, this list of conditions and the following disclaimer in
19+ * the documentation and/or other materials provided with the
20+ * distribution.
21+ * 3. Neither the name of the Company nor the names of its contributors
22+ * may be used to endorse or promote products derived from this
23+ * software without specific prior written permission.
24+ */
25+
26+ #include < rte_ethdev.h>
27+ #include < rte_version.h>
28+
29+ #if RTE_VERSION < RTE_VERSION_NUM(22, 0, 0, 0)
30+ #define RTE_ETH_MQ_RX_RSS ETH_MQ_RX_RSS
31+ #endif
32+
33+ #if RTE_VERSION < RTE_VERSION_NUM(21, 11, 0, 0)
34+ #define RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE DEV_TX_OFFLOAD_MBUF_FAST_FREE
35+
36+ #define RTE_ETH_RX_OFFLOAD_CHECKSUM DEV_RX_OFFLOAD_CHECKSUM
37+
38+ #define RTE_ETH_RX_OFFLOAD_VLAN_STRIP DEV_RX_OFFLOAD_VLAN_STRIP
39+ #define RTE_ETH_RX_OFFLOAD_IPV4_CKSUM DEV_RX_OFFLOAD_IPV4_CKSUM
40+ #define RTE_ETH_RX_OFFLOAD_UDP_CKSUM DEV_RX_OFFLOAD_UDP_CKSUM
41+ #define RTE_ETH_RX_OFFLOAD_TCP_CKSUM DEV_RX_OFFLOAD_TCP_CKSUM
42+ #define RTE_ETH_RX_OFFLOAD_TCP_LRO DEV_RX_OFFLOAD_TCP_LRO
43+ #define RTE_ETH_RX_OFFLOAD_QINQ_STRIP DEV_RX_OFFLOAD_QINQ_STRIP
44+ #define RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM
45+ #define RTE_ETH_RX_OFFLOAD_MACSEC_STRIP DEV_RX_OFFLOAD_MACSEC_STRIP
46+ #define RTE_ETH_RX_OFFLOAD_HEADER_SPLIT DEV_RX_OFFLOAD_HEADER_SPLIT
47+ #define RTE_ETH_RX_OFFLOAD_VLAN_FILTER DEV_RX_OFFLOAD_VLAN_FILTER
48+ #define RTE_ETH_RX_OFFLOAD_VLAN_EXTEND DEV_RX_OFFLOAD_VLAN_EXTEND
49+ #define RTE_ETH_RX_OFFLOAD_SCATTER DEV_RX_OFFLOAD_SCATTER
50+ #define RTE_ETH_RX_OFFLOAD_TIMESTAMP DEV_RX_OFFLOAD_TIMESTAMP
51+ #define RTE_ETH_RX_OFFLOAD_SECURITY DEV_RX_OFFLOAD_SECURITY
52+ #define RTE_ETH_RX_OFFLOAD_KEEP_CRC DEV_RX_OFFLOAD_KEEP_CRC
53+ #define RTE_ETH_RX_OFFLOAD_SCTP_CKSUM DEV_RX_OFFLOAD_SCTP_CKSUM
54+ #define RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM DEV_RX_OFFLOAD_OUTER_UDP_CKSUM
55+ #define RTE_ETH_RX_OFFLOAD_RSS_HASH DEV_RX_OFFLOAD_RSS_HASH
56+
57+ #define RTE_ETH_MQ_TX_NONE ETH_MQ_TX_NONE
58+
59+ #define RTE_ETH_MQ_RX_NONE ETH_MQ_RX_NONE
60+
61+ #define RTE_ETH_RSS_IP ETH_RSS_IP
62+ #define RTE_ETH_RSS_UDP ETH_RSS_UDP
63+ #define RTE_ETH_RSS_TCP ETH_RSS_TCP
64+ #define RTE_ETH_RSS_SCTP ETH_RSS_SCTP
65+ #define RTE_ETH_RSS_TUNNEL ETH_RSS_TUNNEL
66+
67+ #define RTE_ETH_RSS_L3_SRC_ONLY ETH_RSS_L3_SRC_ONLY
68+ #define RTE_ETH_RSS_L3_DST_ONLY ETH_RSS_L3_DST_ONLY
69+ #define RTE_ETH_RSS_L4_SRC_ONLY ETH_RSS_L4_SRC_ONLY
70+ #define RTE_ETH_RSS_L4_DST_ONLY ETH_RSS_L4_DST_ONLY
71+
72+ #define RTE_ETH_RSS_IPV4 ETH_RSS_IPV4
73+ #define RTE_ETH_RSS_FRAG_IPV4 ETH_RSS_FRAG_IPV4
74+ #define RTE_ETH_RSS_NONFRAG_IPV4_TCP ETH_RSS_NONFRAG_IPV4_TCP
75+ #define RTE_ETH_RSS_NONFRAG_IPV4_UDP ETH_RSS_NONFRAG_IPV4_UDP
76+ #define RTE_ETH_RSS_NONFRAG_IPV4_SCTP ETH_RSS_NONFRAG_IPV4_SCTP
77+ #define RTE_ETH_RSS_NONFRAG_IPV4_OTHER ETH_RSS_NONFRAG_IPV4_OTHER
78+ #define RTE_ETH_RSS_IPV6 ETH_RSS_IPV6
79+ #define RTE_ETH_RSS_FRAG_IPV6 ETH_RSS_FRAG_IPV6
80+ #define RTE_ETH_RSS_NONFRAG_IPV6_TCP ETH_RSS_NONFRAG_IPV6_TCP
81+ #define RTE_ETH_RSS_NONFRAG_IPV6_UDP ETH_RSS_NONFRAG_IPV6_UDP
82+ #define RTE_ETH_RSS_NONFRAG_IPV6_SCTP ETH_RSS_NONFRAG_IPV6_SCTP
83+ #define RTE_ETH_RSS_NONFRAG_IPV6_OTHER ETH_RSS_NONFRAG_IPV6_OTHER
84+ #define RTE_ETH_RSS_L2_PAYLOAD ETH_RSS_L2_PAYLOAD
85+ #define RTE_ETH_RSS_IPV6_EX ETH_RSS_IPV6_EX
86+ #define RTE_ETH_RSS_IPV6_TCP_EX ETH_RSS_IPV6_TCP_EX
87+ #define RTE_ETH_RSS_IPV6_UDP_EX ETH_RSS_IPV6_UDP_EX
88+ #define RTE_ETH_RSS_PORT ETH_RSS_PORT
89+ #define RTE_ETH_RSS_VXLAN ETH_RSS_VXLAN
90+ #define RTE_ETH_RSS_NVGRE ETH_RSS_NVGRE
91+ #define RTE_ETH_RSS_GTPU ETH_RSS_GTPU
92+
93+ #define RTE_BIT64 (nr ) (UINT64_C(1 ) << (nr))
94+
95+ #endif
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