Adding RISC-V Vector support for CHERIoT (no floating point support)

Author: vmurali

Makefile

@@ -42,6 +42,7 @@ SAIL_RMEM_INST_SRCS = $(SAIL_RISCV_MODEL_DIR)/riscv_insts_begin.sail $(SAIL_RMEM
 
 # System and platform sources
 SAIL_SYS_SRCS += $(SAIL_RISCV_MODEL_DIR)/riscv_next_regs.sail
+SAIL_SYS_SRCS += $(SAIL_RISCV_MODEL_DIR)/riscv_vext_control.sail
 SAIL_SYS_SRCS += $(SAIL_CHERI_MODEL_DIR)/cheri_sys_exceptions.sail
 SAIL_SYS_SRCS += $(SAIL_RISCV_MODEL_DIR)/riscv_sync_exception.sail
 SAIL_SYS_SRCS += $(SAIL_RISCV_MODEL_DIR)/riscv_next_control.sail
@@ -52,6 +53,18 @@ SAIL_SYS_SRCS += $(SAIL_RISCV_MODEL_DIR)/riscv_csr_ext.sail
 SAIL_SYS_SRCS += $(SAIL_RISCV_MODEL_DIR)/riscv_sys_control.sail
 SAIL_SYS_SRCS += $(SAIL_CHECK_SRCS)
 
+SAIL_DEFAULT_INST += $(SAIL_RISCV_MODEL_DIR)/riscv_insts_vext_utils.sail
+# SAIL_DEFAULT_INST += $(SAIL_RISCV_MODEL_DIR)/riscv_insts_vext_fp_utils.sail
+SAIL_DEFAULT_INST += $(SAIL_RISCV_MODEL_DIR)/riscv_insts_vext_vset.sail
+SAIL_DEFAULT_INST += $(SAIL_RISCV_MODEL_DIR)/riscv_insts_vext_arith.sail
+# SAIL_DEFAULT_INST += $(SAIL_RISCV_MODEL_DIR)/riscv_insts_vext_fp.sail
+SAIL_DEFAULT_INST += $(SAIL_RISCV_MODEL_DIR)/riscv_insts_vext_mem.sail
+SAIL_DEFAULT_INST += $(SAIL_RISCV_MODEL_DIR)/riscv_insts_vext_mask.sail
+SAIL_DEFAULT_INST += $(SAIL_RISCV_MODEL_DIR)/riscv_insts_vext_vm.sail
+# SAIL_DEFAULT_INST += $(SAIL_RISCV_MODEL_DIR)/riscv_insts_vext_fp_vm.sail
+SAIL_DEFAULT_INST += $(SAIL_RISCV_MODEL_DIR)/riscv_insts_vext_red.sail
+# SAIL_DEFAULT_INST += $(SAIL_RISCV_MODEL_DIR)/riscv_insts_vext_fp_red.sail
+
 SAIL_RV32_VM_SRCS = $(SAIL_RISCV_MODEL_DIR)/riscv_vmem_sv32.sail \
                     $(SAIL_RISCV_MODEL_DIR)/riscv_vmem_rv32.sail
 SAIL_RV64_VM_SRCS = $(SAIL_RISCV_MODEL_DIR)/riscv_vmem_sv39.sail \