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vmuralidavidchisnall
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relaxed one more constraint
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archdoc/chap-cheri-riscv.tex

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Original file line numberDiff line numberDiff line change
@@ -481,6 +481,7 @@ \subsection{Sealed capabilities}
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\asm{\$cra} & \asm{\$cnull} & Function return & Return sentries $(4, 5)$\\
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$\ne$ \asm{\$cra} & \asm{\$cnull} & Tail call & Unsealed or interrupt inheriting forward sentry $(0, 1)$\\
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any & \asm{\$cra} & Function call & Unsealed or forward sentries $(0, 1, 2, 3)$\\
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any & $\ne$ \asm{\$cnull} & Function call & Unsealed or interrupt inheriting forward sentry $(0, 1)$\\
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\hline
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\end{tabular}
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\end{center}

src/cheri_insts.sail

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@@ -139,6 +139,7 @@ union clause ast = CJALR : (bits(12), regidx, regidx)
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* 1. *cd* = *cnull*, *cs1* = *cra* and *cs1* is a backwards sentry (Function return aka *cret* is only permitted to backwards sentry)
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* 2. *cd* = *cnull*, *cs1* $ne$ *cra* and *cs1* is unsealed or a forwards interrupt inheriting sentry (Tail calls are only permitted to unsealed caps or interrupt handling sentry using a target register different from *cra*, with the return register *cra* set by a different instruction)
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* 3. *cd* = *cra* and *cs1* is unsealed or a forwards sentry (Function calls are only permitted to unsealed caps or forwards sentry, with link register *cra*)
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* 4. *cd* $\ne$ *cnull* and *cs1* is unsealed or a forwards interrupt inheriting sentry (Less restricted function calls to interrupt inheriting sentries)
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* - *cs1*.**perms** does not grant **Permit_Execute**.
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* - *cs1*.**address** $+$ *imm* is unaligned, ignoring bit 0.
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*
@@ -161,7 +162,8 @@ function clause execute(CJALR(imm, cs1, cd)) = {
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} else if (isCapSealed(cs1_val) & imm != zeros()) |
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not ((cd == zreg & cs1 == ra & isCapBackwardSentry(cs1_val)) |
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(cd == zreg & cs1 != ra & (not(isCapSealed(cs1_val)) | isCapForwardInheritSentry(cs1_val))) |
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(cd == ra & (not(isCapSealed(cs1_val)) | isCapForwardSentry(cs1_val)))) then {
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(cd == ra & (not(isCapSealed(cs1_val)) | isCapForwardSentry(cs1_val))) |
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(cd != zreg & (not(isCapSealed(cs1_val)) | isCapForwardInheritSentry(cs1_val)))) then {
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handle_cheri_reg_exception(CapEx_SealViolation, cs1);
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RETIRE_FAIL
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} else if not (cs1_val.permit_execute) then {

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