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[CHERIoT] Remove all explicit checks for the riscv32cheriot subarchitecture.
It still parses, but we now handle everything related to Cheriot configuration through the clang driver.
1 parent 7bee8e4 commit 6e1a813

32 files changed

+47
-69
lines changed

‎clang/lib/Basic/Targets/RISCV.cpp‎

Lines changed: 1 addition & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -377,15 +377,6 @@ bool RISCVTargetInfo::initFeatureMap(
377377
Features["32bit"] = true;
378378
}
379379

380-
if (getTriple().getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1) {
381-
Features["xcheri"] = true;
382-
Features["xcheriot"] = true;
383-
Features["xcheripurecap"] = true;
384-
Features["c"] = true;
385-
Features["e"] = true;
386-
Features["m"] = true;
387-
}
388-
389380
std::vector<std::string> AllFeatures = FeaturesVec;
390381
auto ParseResult = llvm::RISCVISAInfo::parseFeatures(XLen, FeaturesVec);
391382
if (!ParseResult) {
@@ -464,7 +455,7 @@ bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
464455
CapSize = XLen * 2;
465456
}
466457
if (ABI.empty())
467-
ABI = ISAInfo->computeDefaultABI().str();
458+
ABI = ISAInfo->computeDefaultABI(getTriple()).str();
468459

469460
if (ISAInfo->hasExtension("zfh") || ISAInfo->hasExtension("zhinx"))
470461
HasLegalHalfType = true;

‎clang/lib/Basic/Targets/RISCV.h‎

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,7 @@ class RISCVTargetInfo : public TargetInfo {
8484
bool HasExperimental = false;
8585

8686
public:
87-
RISCVTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
87+
RISCVTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
8888
: TargetInfo(Triple) {
8989
BFloat16Width = 16;
9090
BFloat16Align = 16;
@@ -99,12 +99,6 @@ class RISCVTargetInfo : public TargetInfo {
9999
MCountName = "_mcount";
100100
HasFloat16 = true;
101101
HasStrictFP = true;
102-
103-
if (Triple.getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1) {
104-
CPU = "cheriot";
105-
ABI = (Triple.getOS() == llvm::Triple::CheriotRTOS) ? "cheriot"
106-
: "cheriot-baremetal";
107-
}
108102
}
109103

110104
bool setCPU(const std::string &Name) override {

‎clang/lib/Driver/ToolChains/Arch/RISCV.cpp‎

Lines changed: 8 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -306,19 +306,11 @@ StringRef riscv::getRISCVABI(const ArgList &Args, const llvm::Triple &Triple) {
306306
// rv64e -> lp64e
307307
// rv64* -> lp64
308308
std::string Arch = getRISCVArch(Args, Triple);
309-
if (Triple.getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1) {
310-
llvm::Triple::OSType OS = Triple.getOS();
311-
if (OS == llvm::Triple::CheriotRTOS)
312-
return "cheriot";
313-
else if (OS == llvm::Triple::UnknownOS)
314-
return "cheriot-baremetal";
315-
}
316-
317309
auto ParseResult = llvm::RISCVISAInfo::parseArchString(
318310
Arch, /* EnableExperimentalExtension */ true);
319311
// Ignore parsing error, just go 3rd step.
320312
if (!llvm::errorToBool(ParseResult.takeError()))
321-
return (*ParseResult)->computeDefaultABI();
313+
return (*ParseResult)->computeDefaultABI(Triple);
322314

323315
// 3. Choose a default based on the triple
324316
//
@@ -429,8 +421,7 @@ std::string riscv::getRISCVArch(const llvm::opt::ArgList &Args,
429421
// We deviate from GCC's defaults here:
430422
// - On `riscv{XLEN}-unknown-elf` we default to `rv{XLEN}imac`
431423
// - On all other OSs we use `rv{XLEN}imafdc` (equivalent to `rv{XLEN}gc`)
432-
if (Triple.getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1 ||
433-
Triple.getOS() == llvm::Triple::CheriotRTOS)
424+
if (Triple.getOS() == llvm::Triple::CheriotRTOS)
434425
return "rv32emc_xcheriot";
435426
if (Triple.isRISCV32()) {
436427
if (Triple.getOS() == llvm::Triple::UnknownOS)
@@ -461,9 +452,13 @@ std::string riscv::getRISCVTargetCPU(const llvm::opt::ArgList &Args,
461452
if (!CPU.empty())
462453
return CPU;
463454

464-
if (Triple.getOS() == llvm::Triple::CheriotRTOS ||
465-
Triple.getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1)
455+
if (Triple.getOS() == llvm::Triple::CheriotRTOS)
466456
return "cheriot";
457+
if (const Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) {
458+
StringRef ABI = A->getValue();
459+
if (ABI == "cheriot" || ABI == "cheriot-baremetal")
460+
return "cheriot";
461+
}
467462

468463
return Triple.isRISCV64() ? "generic-rv64" : "generic-rv32";
469464
}

‎clang/test/CodeGen/cheri/cheri-mcu-atomic-libcall.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Wno-atomic-alignment" "-cheri-compartment=example" -S | FileCheck %s
1+
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Wno-atomic-alignment" "-cheri-compartment=example" -S | FileCheck %s
22

33
_Atomic(int) x;
44

‎clang/test/CodeGen/cheri/cheri-mcu-call-libcall.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
1+
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
22
#define LIBCALL __attribute__((cheriot_libcall))
33

44
LIBCALL

‎clang/test/CodeGen/cheri/cheri-mcu-ccall.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
1+
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
22

33
// CHECK: define dso_local chericcallcce i32 @_Z5test2ii(i32 noundef %a0, i32 noundef %a1) local_unnamed_addr addrspace(200) #0
44
__attribute__((cheriot_compartment("example"))) int test2(int a0, int a1) {

‎clang/test/CodeGen/cheri/cheri-mcu-interrupts.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
1+
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
22
int foo(void);
33

44
// CHECK: define dso_local i32 @disabled() local_unnamed_addr addrspace(200) #[[DIS:[0-9]]]

‎clang/test/CodeGen/cheri/cheriot-csetboundsrounddown.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
2-
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
2+
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-unknown" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot-baremetal" "-target-feature" "+xcheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
33

44
// CHECK-LABEL: define dso_local ptr addrspace(200) @foo
55
// CHECK-SAME: (ptr addrspace(200) noundef readnone [[CAP:%.*]], i32 noundef [[B:%.*]]) local_unnamed_addr addrspace(200) #[[ATTR0:[0-9]+]] {

‎clang/test/CodeGen/cheri/cheriot-libcall-ptr-decay.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
2-
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
2+
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
33

44
// CHECK-LABEL: define dso_local void @foo
55
// CHECK-SAME: (ptr addrspace(200) nocapture noundef readonly [[BAR:%.*]]) local_unnamed_addr addrspace(200) #[[ATTR0:[0-9]+]] {

‎clang/test/CodeGen/cheri/cheriot-min-stack.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" -std=c2x | FileCheck %s
1+
// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" -std=c2x | FileCheck %s
22
int foo(void);
33

44
[[cheriot::minimum_stack(256)]]

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