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[CHERI-Generic] Regenerate tests with latest UTC
Mostly just updates the RUN line, but in some cases changes the checks for function signature. Change in preparation for the next commit. No functional change intended
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‎llvm/test/CodeGen/CHERI-Generic/MIPS/atomic-rmw-cap-ptr-arg.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --version 2
22
; DO NOT EDIT -- This file was generated from test/CodeGen/CHERI-Generic/Inputs/atomic-rmw-cap-ptr-arg.ll
33
; Check that we can generate sensible code for atomic operations using capability pointers on capabilities
44
; See https://github.com/CTSRD-CHERI/llvm-project/issues/470

‎llvm/test/CodeGen/CHERI-Generic/MIPS/atomic-rmw-cap-ptr.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --version 2
22
; DO NOT EDIT -- This file was generated from test/CodeGen/CHERI-Generic/Inputs/atomic-rmw-cap-ptr.ll
33
; Check that we can generate sensible code for atomic operations using capability pointers
44
; https://github.com/CTSRD-CHERI/llvm-project/issues/470

‎llvm/test/CodeGen/CHERI-Generic/MIPS/bounded-allocas-lifetimes.ll‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
1+
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
22
; DO NOT EDIT -- This file was generated from test/CodeGen/CHERI-Generic/Inputs/bounded-allocas-lifetimes.ll
3+
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
34
; CHERI-GENERIC-UTC: mir
45
; RUN: llc -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi purecap %s -o - --stop-after=finalize-isel | FileCheck %s
56

‎llvm/test/CodeGen/CHERI-Generic/MIPS/cap-from-ptr.ll‎

Lines changed: 30 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --version 2
22
; DO NOT EDIT -- This file was generated from test/CodeGen/CHERI-Generic/Inputs/cap-from-ptr.ll
33
;; Check that we can correctly generate code for llvm.cheri.cap.from.pointer()
44
;; This previously asserted on RISC-V due to a broken ISel pattern.
@@ -7,7 +7,7 @@
77
; RUN: opt -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi purecap -passes=instcombine -S < %s | llc -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi purecap | FileCheck %s --check-prefix=PURECAP
88
; RUN: opt -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi n64 -passes=instcombine -S < %s | llc -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi n64 | FileCheck %s --check-prefix=HYBRID
99

10-
define internal i8 addrspace(200)* @test(i8 addrspace(200)* addrspace(200)* %ptr, i8 addrspace(200)* %cap, i64 %offset) addrspace(200) nounwind {
10+
define internal ptr addrspace(200) @test(ptr addrspace(200) %ptr, ptr addrspace(200) %cap, i64 %offset) addrspace(200) nounwind {
1111
; PURECAP-LABEL: test:
1212
; PURECAP: # %bb.0: # %entry
1313
; PURECAP-NEXT: cfromptr $c1, $c4, $4
@@ -21,21 +21,21 @@ define internal i8 addrspace(200)* @test(i8 addrspace(200)* addrspace(200)* %ptr
2121
; HYBRID-NEXT: csc $c1, $zero, 0($c3)
2222
; HYBRID-NEXT: jr $ra
2323
; HYBRID-NEXT: cmove $c3, $c1
24-
; CHECK-IR-LABEL: define {{[^@]+}}@test
24+
; CHECK-IR-LABEL: define internal ptr addrspace(200) @test
2525
; CHECK-IR-SAME: (ptr addrspace(200) [[PTR:%.*]], ptr addrspace(200) [[CAP:%.*]], i64 [[OFFSET:%.*]]) addrspace(200) #[[ATTR0:[0-9]+]] {
2626
; CHECK-IR-NEXT: entry:
2727
; CHECK-IR-NEXT: [[NEW:%.*]] = call ptr addrspace(200) @llvm.cheri.cap.from.pointer.i64(ptr addrspace(200) [[CAP]], i64 [[OFFSET]])
2828
; CHECK-IR-NEXT: store ptr addrspace(200) [[NEW]], ptr addrspace(200) [[PTR]], align 16
2929
; CHECK-IR-NEXT: ret ptr addrspace(200) [[NEW]]
3030
;
3131
entry:
32-
%new = call i8 addrspace(200)* @llvm.cheri.cap.from.pointer.i64(i8 addrspace(200)* %cap, i64 %offset)
33-
store i8 addrspace(200)* %new, i8 addrspace(200)* addrspace(200)* %ptr, align 16
34-
ret i8 addrspace(200)* %new
32+
%new = call ptr addrspace(200) @llvm.cheri.cap.from.pointer.i64(ptr addrspace(200) %cap, i64 %offset)
33+
store ptr addrspace(200) %new, ptr addrspace(200) %ptr, align 16
34+
ret ptr addrspace(200) %new
3535
}
3636

3737
;; (int_cheri_cap_from_ptr x, 0) -> null
38-
define internal i8 addrspace(200)* @cap_from_ptr_zero(i8 addrspace(200)* addrspace(200)* %ptr, i8 addrspace(200)* %cap) addrspace(200) nounwind {
38+
define internal ptr addrspace(200) @cap_from_ptr_zero(ptr addrspace(200) %ptr, ptr addrspace(200) %cap) nounwind {
3939
; PURECAP-LABEL: cap_from_ptr_zero:
4040
; PURECAP: # %bb.0: # %entry
4141
; PURECAP-NEXT: csc $cnull, $zero, 0($c3)
@@ -47,20 +47,20 @@ define internal i8 addrspace(200)* @cap_from_ptr_zero(i8 addrspace(200)* addrspa
4747
; HYBRID-NEXT: csc $cnull, $zero, 0($c3)
4848
; HYBRID-NEXT: jr $ra
4949
; HYBRID-NEXT: cgetnull $c3
50-
; CHECK-IR-LABEL: define {{[^@]+}}@cap_from_ptr_zero
50+
; CHECK-IR-LABEL: define internal ptr addrspace(200) @cap_from_ptr_zero
5151
; CHECK-IR-SAME: (ptr addrspace(200) [[PTR:%.*]], ptr addrspace(200) [[CAP:%.*]]) addrspace(200) #[[ATTR0]] {
5252
; CHECK-IR-NEXT: entry:
5353
; CHECK-IR-NEXT: store ptr addrspace(200) null, ptr addrspace(200) [[PTR]], align 16
5454
; CHECK-IR-NEXT: ret ptr addrspace(200) null
5555
;
5656
entry:
57-
%new = call i8 addrspace(200)* @llvm.cheri.cap.from.pointer.i64(i8 addrspace(200)* %cap, i64 0)
58-
store i8 addrspace(200)* %new, i8 addrspace(200)* addrspace(200)* %ptr, align 16
59-
ret i8 addrspace(200)* %new
57+
%new = call ptr addrspace(200) @llvm.cheri.cap.from.pointer.i64(ptr addrspace(200) %cap, i64 0)
58+
store ptr addrspace(200) %new, ptr addrspace(200) %ptr, align 16
59+
ret ptr addrspace(200) %new
6060
}
6161

6262
;; Check that (int_cheri_cap_from_ptr ddc, x) can use the DDC register directly
63-
define internal i8 addrspace(200)* @cap_from_ptr_ddc(i8 addrspace(200)* addrspace(200)* %ptr, i64 %offset) addrspace(200) nounwind {
63+
define internal ptr addrspace(200) @cap_from_ptr_ddc(ptr addrspace(200) %ptr, i64 %offset) nounwind {
6464
; PURECAP-LABEL: cap_from_ptr_ddc:
6565
; PURECAP: # %bb.0: # %entry
6666
; PURECAP-NEXT: cfromddc $c1, $4
@@ -74,7 +74,7 @@ define internal i8 addrspace(200)* @cap_from_ptr_ddc(i8 addrspace(200)* addrspac
7474
; HYBRID-NEXT: csc $c1, $zero, 0($c3)
7575
; HYBRID-NEXT: jr $ra
7676
; HYBRID-NEXT: cmove $c3, $c1
77-
; CHECK-IR-LABEL: define {{[^@]+}}@cap_from_ptr_ddc
77+
; CHECK-IR-LABEL: define internal ptr addrspace(200) @cap_from_ptr_ddc
7878
; CHECK-IR-SAME: (ptr addrspace(200) [[PTR:%.*]], i64 [[OFFSET:%.*]]) addrspace(200) #[[ATTR0]] {
7979
; CHECK-IR-NEXT: entry:
8080
; CHECK-IR-NEXT: [[DDC:%.*]] = call ptr addrspace(200) @llvm.cheri.ddc.get()
@@ -83,14 +83,14 @@ define internal i8 addrspace(200)* @cap_from_ptr_ddc(i8 addrspace(200)* addrspac
8383
; CHECK-IR-NEXT: ret ptr addrspace(200) [[NEW]]
8484
;
8585
entry:
86-
%ddc = call i8 addrspace(200)* @llvm.cheri.ddc.get()
87-
%new = call i8 addrspace(200)* @llvm.cheri.cap.from.pointer.i64(i8 addrspace(200)* %ddc, i64 %offset)
88-
store i8 addrspace(200)* %new, i8 addrspace(200)* addrspace(200)* %ptr, align 16
89-
ret i8 addrspace(200)* %new
86+
%ddc = call ptr addrspace(200) @llvm.cheri.ddc.get()
87+
%new = call ptr addrspace(200) @llvm.cheri.cap.from.pointer.i64(ptr addrspace(200) %ddc, i64 %offset)
88+
store ptr addrspace(200) %new, ptr addrspace(200) %ptr, align 16
89+
ret ptr addrspace(200) %new
9090
}
9191

9292
;; Check that (int_cheri_cap_from_ptr x, 0) -> null has priority over direct DDC usage
93-
define internal i8 addrspace(200)* @cap_from_ptr_ddc_zero(i8 addrspace(200)* addrspace(200)* %ptr) addrspace(200) nounwind {
93+
define internal ptr addrspace(200) @cap_from_ptr_ddc_zero(ptr addrspace(200) %ptr) nounwind {
9494
; PURECAP-LABEL: cap_from_ptr_ddc_zero:
9595
; PURECAP: # %bb.0: # %entry
9696
; PURECAP-NEXT: csc $cnull, $zero, 0($c3)
@@ -102,21 +102,21 @@ define internal i8 addrspace(200)* @cap_from_ptr_ddc_zero(i8 addrspace(200)* add
102102
; HYBRID-NEXT: csc $cnull, $zero, 0($c3)
103103
; HYBRID-NEXT: jr $ra
104104
; HYBRID-NEXT: cgetnull $c3
105-
; CHECK-IR-LABEL: define {{[^@]+}}@cap_from_ptr_ddc_zero
105+
; CHECK-IR-LABEL: define internal ptr addrspace(200) @cap_from_ptr_ddc_zero
106106
; CHECK-IR-SAME: (ptr addrspace(200) [[PTR:%.*]]) addrspace(200) #[[ATTR0]] {
107107
; CHECK-IR-NEXT: entry:
108108
; CHECK-IR-NEXT: store ptr addrspace(200) null, ptr addrspace(200) [[PTR]], align 16
109109
; CHECK-IR-NEXT: ret ptr addrspace(200) null
110110
;
111111
entry:
112-
%ddc = call i8 addrspace(200)* @llvm.cheri.ddc.get()
113-
%new = call i8 addrspace(200)* @llvm.cheri.cap.from.pointer.i64(i8 addrspace(200)* %ddc, i64 0)
114-
store i8 addrspace(200)* %new, i8 addrspace(200)* addrspace(200)* %ptr, align 16
115-
ret i8 addrspace(200)* %new
112+
%ddc = call ptr addrspace(200) @llvm.cheri.ddc.get()
113+
%new = call ptr addrspace(200) @llvm.cheri.cap.from.pointer.i64(ptr addrspace(200) %ddc, i64 0)
114+
store ptr addrspace(200) %new, ptr addrspace(200) %ptr, align 16
115+
ret ptr addrspace(200) %new
116116
}
117117

118118
;; Check that (int_cheri_cap_from_ptr null, x) does not use register zero (since that is DDC)
119-
define internal i8 addrspace(200)* @cap_from_ptr_null(i8 addrspace(200)* addrspace(200)* %ptr, i64 %offset) addrspace(200) nounwind {
119+
define internal ptr addrspace(200) @cap_from_ptr_null(ptr addrspace(200) %ptr, i64 %offset) nounwind {
120120
; PURECAP-LABEL: cap_from_ptr_null:
121121
; PURECAP: # %bb.0: # %entry
122122
; PURECAP-NEXT: cgetnull $c1
@@ -132,18 +132,18 @@ define internal i8 addrspace(200)* @cap_from_ptr_null(i8 addrspace(200)* addrspa
132132
; HYBRID-NEXT: csc $c1, $zero, 0($c3)
133133
; HYBRID-NEXT: jr $ra
134134
; HYBRID-NEXT: cmove $c3, $c1
135-
; CHECK-IR-LABEL: define {{[^@]+}}@cap_from_ptr_null
135+
; CHECK-IR-LABEL: define internal ptr addrspace(200) @cap_from_ptr_null
136136
; CHECK-IR-SAME: (ptr addrspace(200) [[PTR:%.*]], i64 [[OFFSET:%.*]]) addrspace(200) #[[ATTR0]] {
137137
; CHECK-IR-NEXT: entry:
138138
; CHECK-IR-NEXT: [[NEW:%.*]] = call ptr addrspace(200) @llvm.cheri.cap.from.pointer.i64(ptr addrspace(200) null, i64 [[OFFSET]])
139139
; CHECK-IR-NEXT: store ptr addrspace(200) [[NEW]], ptr addrspace(200) [[PTR]], align 16
140140
; CHECK-IR-NEXT: ret ptr addrspace(200) [[NEW]]
141141
;
142142
entry:
143-
%new = call i8 addrspace(200)* @llvm.cheri.cap.from.pointer.i64(i8 addrspace(200)* null, i64 %offset)
144-
store i8 addrspace(200)* %new, i8 addrspace(200)* addrspace(200)* %ptr, align 16
145-
ret i8 addrspace(200)* %new
143+
%new = call ptr addrspace(200) @llvm.cheri.cap.from.pointer.i64(ptr addrspace(200) null, i64 %offset)
144+
store ptr addrspace(200) %new, ptr addrspace(200) %ptr, align 16
145+
ret ptr addrspace(200) %new
146146
}
147147

148-
declare i8 addrspace(200)* @llvm.cheri.cap.from.pointer.i64(i8 addrspace(200)*, i64)
149-
declare i8 addrspace(200)* @llvm.cheri.ddc.get()
148+
declare ptr addrspace(200) @llvm.cheri.cap.from.pointer.i64(ptr addrspace(200), i64)
149+
declare ptr addrspace(200) @llvm.cheri.ddc.get()

‎llvm/test/CodeGen/CHERI-Generic/MIPS/cheri-csub.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --version 2
22
; DO NOT EDIT -- This file was generated from test/CodeGen/CHERI-Generic/Inputs/cheri-csub.ll
33
; RUN: llc -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi n64 %s -o - | FileCheck %s --check-prefix=HYBRID
44
; RUN: llc -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi purecap %s -o - | FileCheck %s --check-prefix=PURECAP

‎llvm/test/CodeGen/CHERI-Generic/MIPS/cheri-intrinsics-folding-broken-module-regression.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --version 3
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --version 2
22
; DO NOT EDIT -- This file was generated from test/CodeGen/CHERI-Generic/Inputs/cheri-intrinsics-folding-broken-module-regression.ll
33
; This used to create a broken function.
44
; FIXME: the getoffset+add sequence should be folded to an increment

‎llvm/test/CodeGen/CHERI-Generic/MIPS/cheri-memfn-call.ll‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,13 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --version 2
22
; DO NOT EDIT -- This file was generated from test/CodeGen/CHERI-Generic/Inputs/cheri-memfn-call.ll
33
; Check that we call memset_c/memmove_c/memcpy_c in hybrid mode.
44
; RUN: llc -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi purecap %s -o - | FileCheck %s --check-prefix=PURECAP
55
; RUN: llc -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi n64 %s -o - | FileCheck %s --check-prefix=HYBRID
66
%struct.x = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
77

8-
declare void @llvm.memmove.p200i8.p200i8.i64(ptr addrspace(200) nocapture, ptr addrspace(200) nocapture readonly, i64, i1)
9-
declare void @llvm.memset.p200i8.i64(ptr addrspace(200) nocapture, i8, i64, i1)
10-
declare void @llvm.memcpy.p200i8.p200i8.i64(ptr addrspace(200) nocapture, ptr addrspace(200) nocapture readonly, i64, i1)
8+
declare void @llvm.memmove.p200.p200.i64(ptr addrspace(200) nocapture, ptr addrspace(200) nocapture readonly, i64, i1)
9+
declare void @llvm.memset.p200.i64(ptr addrspace(200) nocapture, i8, i64, i1)
10+
declare void @llvm.memcpy.p200.p200.i64(ptr addrspace(200) nocapture, ptr addrspace(200) nocapture readonly, i64, i1)
1111

1212
define void @call_memset(ptr addrspace(200) align 4 %dst) nounwind {
1313
; PURECAP-LABEL: call_memset:
@@ -44,7 +44,7 @@ define void @call_memset(ptr addrspace(200) align 4 %dst) nounwind {
4444
; HYBRID-NEXT: jr $ra
4545
; HYBRID-NEXT: daddiu $sp, $sp, 16
4646
entry:
47-
call void @llvm.memset.p200i8.i64(ptr addrspace(200) align 4 %dst, i8 0, i64 40, i1 false)
47+
call void @llvm.memset.p200.i64(ptr addrspace(200) align 4 %dst, i8 0, i64 40, i1 false)
4848
ret void
4949
}
5050

@@ -81,7 +81,7 @@ define void @call_memcpy(ptr addrspace(200) align 4 %dst, ptr addrspace(200) ali
8181
; HYBRID-NEXT: jr $ra
8282
; HYBRID-NEXT: daddiu $sp, $sp, 16
8383
entry:
84-
call void @llvm.memcpy.p200i8.p200i8.i64(ptr addrspace(200) align 4 %dst, ptr addrspace(200) align 4 %src, i64 40, i1 false)
84+
call void @llvm.memcpy.p200.p200.i64(ptr addrspace(200) align 4 %dst, ptr addrspace(200) align 4 %src, i64 40, i1 false)
8585
ret void
8686
}
8787

@@ -118,7 +118,7 @@ define void @call_memmove(ptr addrspace(200) align 4 %dst, ptr addrspace(200) al
118118
; HYBRID-NEXT: jr $ra
119119
; HYBRID-NEXT: daddiu $sp, $sp, 16
120120
entry:
121-
call void @llvm.memmove.p200i8.p200i8.i64(ptr addrspace(200) align 4 %dst, ptr addrspace(200) align 4 %src, i64 40, i1 false)
121+
call void @llvm.memmove.p200.p200.i64(ptr addrspace(200) align 4 %dst, ptr addrspace(200) align 4 %src, i64 40, i1 false)
122122
ret void
123123
}
124124

‎llvm/test/CodeGen/CHERI-Generic/MIPS/cheri-pointer-comparison.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --version 2
22
; DO NOT EDIT -- This file was generated from test/CodeGen/CHERI-Generic/Inputs/cheri-pointer-comparison.ll
33
; RUN: llc -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi n64 %s -o - | FileCheck %s --check-prefix=HYBRID
44
; RUN: llc -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi purecap %s -o - | FileCheck %s --check-prefix=PURECAP

‎llvm/test/CodeGen/CHERI-Generic/MIPS/dagcombine-ptradd-deleted-regression.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --version 2
22
; DO NOT EDIT -- This file was generated from test/CodeGen/CHERI-Generic/Inputs/dagcombine-ptradd-deleted-regression.ll
33
; This would previously crash DAGCombiner::visitPTRADD since the PTRADD
44
; corresponding to the second GEP would be collapsed to a no-op when

‎llvm/test/CodeGen/CHERI-Generic/MIPS/function-alias-size.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --version 2
22
; DO NOT EDIT -- This file was generated from test/CodeGen/CHERI-Generic/Inputs/function-alias-size.ll
33
; RUN: llc -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi purecap %s -o - < %s | FileCheck %s --check-prefix=ASM
44
; RUN: llc -mtriple=mips64 -mcpu=cheri128 -mattr=+cheri128 --relocation-model=pic -target-abi purecap %s -o - -filetype=obj < %s | llvm-objdump --syms -r - | FileCheck %s --check-prefix=OBJDUMP

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