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jrtc27
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[ELF][CHERI][RISCV] Drop opt-in -z cheri-riscv-jump-slot
This opt-in was just to allow building CheriBSD that did not yet support this. Now that all of dev, main and releng/25.03 support it we can enable it by default and drop the old config. No opt-out option is provided.
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6 files changed

+63
-125
lines changed

6 files changed

+63
-125
lines changed

‎lld/ELF/Arch/RISCV.cpp‎

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -260,10 +260,6 @@ void RISCV::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
260260
}
261261

262262
void RISCV::writePltHeader(uint8_t *buf) const {
263-
if (ctx.arg.isCheriAbi && !ctx.arg.zCheriRiscvJumpSlot) {
264-
memset(buf, 0, pltHeaderSize);
265-
return;
266-
}
267263
// 1: auipc(c) (c)t2, %pcrel_hi(.got.plt)
268264
// (c)sub t1, (c)t1, (c)t3
269265
// l[wdc] (c)t3, %pcrel_lo(1b)((c)t2); (c)t3 = _dl_runtime_resolve
@@ -303,9 +299,7 @@ void RISCV::writePlt(uint8_t *buf, const Symbol &sym,
303299
// nop
304300
uint32_t ptrload = ctx.arg.isCheriAbi ? ctx.arg.is64 ? CLC_128 : CLC_64
305301
: ctx.arg.is64 ? LD : LW;
306-
uint32_t entryva = ctx.arg.isCheriAbi && !ctx.arg.zCheriRiscvJumpSlot
307-
? sym.getGotVA(ctx)
308-
: sym.getGotPltVA(ctx);
302+
uint32_t entryva = sym.getGotPltVA(ctx);
309303
uint32_t offset = entryva - pltEntryAddr;
310304
write32le(buf + 0, utype(AUIPC, X_T3, hi20(offset)));
311305
write32le(buf + 4, itype(ptrload, X_T3, X_T3, lo12(offset)));

‎lld/ELF/Config.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -413,7 +413,6 @@ struct Config {
413413
// -z captabledebug: add additional symbols $captable_load_<symbols> before
414414
// each captable clc instruction that indicates which symbol should be loaded
415415
bool zCapTableDebug;
416-
bool zCheriRiscvJumpSlot;
417416
bool zCombreloc;
418417
bool zCopyreloc;
419418
bool zDynamicUndefined;

‎lld/ELF/Driver.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1645,8 +1645,8 @@ static void readConfigs(Ctx &ctx, opt::InputArgList &args) {
16451645
ctx.arg.warnSymbolOrdering =
16461646
args.hasFlag(OPT_warn_symbol_ordering, OPT_no_warn_symbol_ordering, true);
16471647
ctx.arg.whyExtract = args.getLastArgValue(OPT_why_extract);
1648-
ctx.arg.zCapTableDebug = getZFlag(args, "captabledebug", "nocaptabledebug", false);
1649-
ctx.arg.zCheriRiscvJumpSlot = hasZOption(args, "cheri-riscv-jump-slot");
1648+
ctx.arg.zCapTableDebug =
1649+
getZFlag(args, "captabledebug", "nocaptabledebug", false);
16501650
for (opt::Arg *arg : args.filtered(OPT_why_live)) {
16511651
StringRef value(arg->getValue());
16521652
if (Expected<GlobPattern> pat = GlobPattern::create(arg->getValue())) {

‎lld/ELF/Relocations.cpp‎

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -924,16 +924,6 @@ static void addPltEntry(Ctx &ctx, PltSection &plt, GotPltSection &gotPlt,
924924
RelocationBaseSection &rel, RelType type, Symbol &sym) {
925925
plt.addEntry(sym);
926926

927-
// For CHERI-RISC-V if JUMP_SLOT relocations are disabled (to be compatible
928-
// with old CheriBSD) we mark the symbol NEEDS_GOT so it will end up in .got
929-
// as a function pointer, and uses .rela.dyn rather than .rela.plt, so no
930-
// rtld changes are needed.
931-
//
932-
// TODO: Remove this option.
933-
if (ctx.arg.emachine == EM_RISCV && ctx.arg.isCheriAbi &&
934-
!ctx.arg.zCheriRiscvJumpSlot)
935-
return;
936-
937927
if (ctx.arg.isCheriAbi && !sym.isPreemptible)
938928
error("cannot create non-preemptible PLT entry on CHERI against symbol: " +
939929
toStr(ctx, sym));
@@ -1204,10 +1194,6 @@ void RelocationScanner::processAux(RelExpr expr, RelType type, uint64_t offset,
12041194
}
12051195
} else if (needsPlt(expr)) {
12061196
sym.setFlags(NEEDS_PLT);
1207-
// See addPltEntry
1208-
if (ctx.arg.emachine == EM_RISCV && ctx.arg.isCheriAbi &&
1209-
!ctx.arg.zCheriRiscvJumpSlot)
1210-
sym.setFlags(NEEDS_GOT);
12111197
} else if (LLVM_UNLIKELY(isIfunc)) {
12121198
sym.setFlags(HAS_DIRECT_RELOC);
12131199
}
@@ -1378,10 +1364,6 @@ void RelocationScanner::processAux(RelExpr expr, RelType type, uint64_t offset,
13781364
printLocation(diag, *sec, sym, offset);
13791365
}
13801366
sym.setFlags(NEEDS_COPY | NEEDS_PLT);
1381-
// See addPltEntry
1382-
if (ctx.arg.emachine == EM_RISCV && ctx.arg.isCheriAbi &&
1383-
!ctx.arg.zCheriRiscvJumpSlot)
1384-
sym.setFlags(NEEDS_GOT);
13851367
sec->addReloc({expr, type, offset, addend, &sym});
13861368
return;
13871369
}

‎lld/test/ELF/cheri/exception-table.ll‎

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -83,22 +83,25 @@
8383
; RUN: llvm-readelf -r --symbols --cap-relocs %t/riscv.so | FileCheck %s --check-prefixes=RV64-RELOCS,RV64-RELOCS-OVERRIDE
8484

8585
; RV64-RELOCS-LABEL: Symbol table '.symtab' contains
86-
; RV64-RELOCS: [[#%.16x,TEST_ADDR:]] 116 FUNC LOCAL DEFAULT 8 .L_Z4testll$local
87-
; RV64-RELOCS: [[#%.16x,TEST2_ADDR:]] 124 FUNC LOCAL DEFAULT 8 .L_Z5test2ll$local
88-
; RV64-RELOCS: [[#%.16x,TEST_WEAK_ADDR:]] 52 FUNC LOCAL DEFAULT 8 .L_Z9test_weakll$local
89-
; RV64-RELOCS: [[#%.16x,TEST_ADDR]] 116 FUNC GLOBAL DEFAULT 8 _Z4testll{{$}}
90-
; RV64-RELOCS: [[#%.16x,TEST2_ADDR]] 124 FUNC GLOBAL DEFAULT 8 _Z5test2ll{{$}}
91-
; RV64-RELOCS-WEAK: [[#%.16x,TEST_WEAK_ADDR]] 52 FUNC WEAK DEFAULT 8 _Z9test_weakll{{$}}
86+
; RV64-RELOCS: [[#%.16x,TEST_ADDR:]] 116 FUNC LOCAL DEFAULT 9 .L_Z4testll$local
87+
; RV64-RELOCS: [[#%.16x,TEST2_ADDR:]] 124 FUNC LOCAL DEFAULT 9 .L_Z5test2ll$local
88+
; RV64-RELOCS: [[#%.16x,TEST_WEAK_ADDR:]] 52 FUNC LOCAL DEFAULT 9 .L_Z9test_weakll$local
89+
; RV64-RELOCS: [[#%.16x,TEST_ADDR]] 116 FUNC GLOBAL DEFAULT 9 _Z4testll{{$}}
90+
; RV64-RELOCS: [[#%.16x,TEST2_ADDR]] 124 FUNC GLOBAL DEFAULT 9 _Z5test2ll{{$}}
91+
; RV64-RELOCS-WEAK: [[#%.16x,TEST_WEAK_ADDR]] 52 FUNC WEAK DEFAULT 9 _Z9test_weakll{{$}}
9292
; Check that the overridden address is not equal to the local symbol (and much smaller)
9393
; RV64-RELOCS-OVERRIDE-NOT: [[#%.16x,TEST_WEAK_ADDR]]
94-
; RV64-RELOCS-OVERRIDE: [[#%.16x,TEST_WEAK_OVERRIDE_ADDR:]] 8 FUNC GLOBAL DEFAULT 8 _Z9test_weakll{{$}}
94+
; RV64-RELOCS-OVERRIDE: [[#%.16x,TEST_WEAK_OVERRIDE_ADDR:]] 8 FUNC GLOBAL DEFAULT 9 _Z9test_weakll{{$}}
9595

9696
; RV64-RELOCS: CHERI __cap_relocs [
9797
; RV64-RELOCS-NEXT: 0x003{{.+}} Base: 0x[[#%x,TEST_ADDR]] (.L_Z4testll$local+92) Length: 116 Perms: Function
9898
; RV64-RELOCS-NEXT: 0x003{{.+}} Base: 0x[[#%x,TEST_ADDR]] (.L_Z4testll$local+72) Length: 116 Perms: Function
9999
; RV64-RELOCS-NEXT: 0x003{{.+}} Base: 0x[[#%x,TEST2_ADDR]] (.L_Z5test2ll$local+68) Length: 124 Perms: Function
100100
; Next one references the local symbol, and uses that length rather than the override:
101101
; RV64-RELOCS-NEXT: 0x003{{.+}} Base: 0x[[#%x,TEST_WEAK_ADDR]] (.L_Z9test_weakll$local+28) Length: 52 Perms: Function
102+
; RV64-RELOCS-NEXT: 0x003{{.+}} Base: 0x[[#%x,PLT0_ADDR:]] (<unknown symbol>+0) Length: 80 Perms: Function
103+
; RV64-RELOCS-NEXT: 0x003{{.+}} Base: 0x[[#%x,PLT0_ADDR]] (<unknown symbol>+0) Length: 80 Perms: Function
104+
; RV64-RELOCS-NEXT: 0x003{{.+}} Base: 0x[[#%x,PLT0_ADDR]] (<unknown symbol>+0) Length: 80 Perms: Function
102105
; RV64-RELOCS-NEXT: ]
103106

104107
; IR was generated from the following code:

‎lld/test/ELF/cheri/riscv/plt.s‎

Lines changed: 50 additions & 90 deletions
Original file line numberDiff line numberDiff line change
@@ -4,30 +4,20 @@
44
# RUN: %riscv32_cheri_purecap_llvm-mc -filetype=obj %t1.s -o %t1.32.o
55
# RUN: ld.lld -shared %t1.32.o -soname=t1.32.so -o %t1.32.so
66
# RUN: %riscv32_cheri_purecap_llvm-mc -filetype=obj %s -o %t.32.o
7-
# RUN: ld.lld %t.32.o %t1.32.so -z separate-code -o %t.32.got
8-
# RUN: llvm-readelf -S -s %t.32.got | FileCheck --check-prefixes=SEC,NM %s
9-
# RUN: llvm-readobj -r --cap-relocs %t.32.got | FileCheck --check-prefix=RELOCGOT32 %s
10-
# RUN: llvm-readelf -x .got %t.32.got | FileCheck --check-prefix=GOT32 %s
11-
# RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex=false %t.32.got | FileCheck --check-prefixes=DIS,DISGOT,DISGOT32 %s
12-
# RUN: ld.lld %t.32.o %t1.32.so -z separate-code -z cheri-riscv-jump-slot -o %t.32.got.plt
13-
# RUN: llvm-readelf -S -s %t.32.got.plt | FileCheck --check-prefixes=SEC,NM %s
14-
# RUN: llvm-readobj -r --cap-relocs %t.32.got.plt | FileCheck --check-prefix=RELOCGOTPLT32 %s
15-
# RUN: llvm-readelf -x .got.plt %t.32.got.plt | FileCheck --check-prefix=GOTPLT32 %s
16-
# RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex=false %t.32.got.plt | FileCheck --check-prefixes=DIS,DISGOTPLT,DISGOTPLT32 %s
7+
# RUN: ld.lld %t.32.o %t1.32.so -z separate-code -o %t.32
8+
# RUN: llvm-readelf -S -s %t.32 | FileCheck --check-prefixes=SEC,NM %s
9+
# RUN: llvm-readobj -r --cap-relocs %t.32 | FileCheck --check-prefix=RELOC32 %s
10+
# RUN: llvm-readelf -x .got.plt %t.32 | FileCheck --check-prefix=GOTPLT32 %s
11+
# RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex=false %t.32 | FileCheck --check-prefixes=DIS,DIS32 %s
1712

1813
# RUN: %riscv64_cheri_purecap_llvm-mc -filetype=obj %t1.s -o %t1.64.o
1914
# RUN: ld.lld -shared %t1.64.o -soname=t1.64.so -o %t1.64.so
2015
# RUN: %riscv64_cheri_purecap_llvm-mc -filetype=obj %s -o %t.64.o
21-
# RUN: ld.lld %t.64.o %t1.64.so -z separate-code -o %t.64.got
22-
# RUN: llvm-readelf -S -s %t.64.got | FileCheck --check-prefixes=SEC,NM %s
23-
# RUN: llvm-readobj -r --cap-relocs %t.64.got | FileCheck --check-prefix=RELOCGOT64 %s
24-
# RUN: llvm-readelf -x .got %t.64.got | FileCheck --check-prefix=GOT64 %s
25-
# RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex=false %t.64.got | FileCheck --check-prefixes=DIS,DISGOT,DISGOT64 %s
26-
# RUN: ld.lld %t.64.o %t1.64.so -z separate-code -z cheri-riscv-jump-slot -o %t.64.got.plt
27-
# RUN: llvm-readelf -S -s %t.64.got.plt | FileCheck --check-prefixes=SEC,NM %s
28-
# RUN: llvm-readobj -r --cap-relocs %t.64.got.plt | FileCheck --check-prefix=RELOCGOTPLT64 %s
29-
# RUN: llvm-readelf -x .got.plt %t.64.got.plt | FileCheck --check-prefix=GOTPLT64 %s
30-
# RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex=false %t.64.got.plt | FileCheck --check-prefixes=DIS,DISGOTPLT,DISGOTPLT64 %s
16+
# RUN: ld.lld %t.64.o %t1.64.so -z separate-code -o %t.64
17+
# RUN: llvm-readelf -S -s %t.64 | FileCheck --check-prefixes=SEC,NM %s
18+
# RUN: llvm-readobj -r --cap-relocs %t.64 | FileCheck --check-prefix=RELOC64 %s
19+
# RUN: llvm-readelf -x .got.plt %t.64 | FileCheck --check-prefix=GOTPLT64 %s
20+
# RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex=false %t.64 | FileCheck --check-prefixes=DIS,DIS64 %s
3121

3222
# SEC: .plt PROGBITS {{0*}}00011030
3323

@@ -36,45 +26,26 @@
3626
# NM: {{0*}}00000000 0 FUNC GLOBAL DEFAULT UND bar
3727
# NM: {{0*}}00000000 0 FUNC WEAK DEFAULT UND weak
3828

39-
# RELOCGOT32: .rela.dyn {
40-
# RELOCGOT32-NEXT: 0x12068 R_RISCV_CHERI_CAPABILITY bar 0x0
41-
# RELOCGOT32-NEXT: 0x12070 R_RISCV_CHERI_CAPABILITY weak 0x0
42-
# RELOCGOT32-NEXT: }
43-
# RELOCGOT32: There is no __cap_relocs section in the file.
44-
# GOT32: section '.got'
45-
# GOT32-NEXT: 0x00012060 00200100 00000000 00000000 00000000
46-
# GOT32-NEXT: 0x00012070 00000000 00000000
47-
48-
# RELOCGOTPLT32: .rela.plt {
49-
# RELOCGOTPLT32-NEXT: 0x13088 R_RISCV_JUMP_SLOT bar 0x0
50-
# RELOCGOTPLT32-NEXT: 0x13090 R_RISCV_JUMP_SLOT weak 0x0
51-
# RELOCGOTPLT32-NEXT: }
52-
# RELOCGOTPLT32: CHERI __cap_relocs [
53-
# RELOCGOTPLT32-NEXT: 0x013088 Base: 0x11030 (<unknown symbol>+0) Length: 64 Perms: Function
54-
# RELOCGOTPLT32-NEXT: 0x013090 Base: 0x11030 (<unknown symbol>+0) Length: 64 Perms: Function
55-
# RELOCGOTPLT32-NEXT: ]
29+
# RELOC32: .rela.plt {
30+
# RELOC32-NEXT: 0x13088 R_RISCV_JUMP_SLOT bar 0x0
31+
# RELOC32-NEXT: 0x13090 R_RISCV_JUMP_SLOT weak 0x0
32+
# RELOC32-NEXT: }
33+
# RELOC32: CHERI __cap_relocs [
34+
# RELOC32-NEXT: 0x013088 Base: 0x11030 (<unknown symbol>+0) Length: 64 Perms: Function
35+
# RELOC32-NEXT: 0x013090 Base: 0x11030 (<unknown symbol>+0) Length: 64 Perms: Function
36+
# RELOC32-NEXT: ]
5637
# GOTPLT32: section '.got.plt'
5738
# GOTPLT32-NEXT: 0x00013078 00000000 00000000 00000000 00000000
5839
# GOTPLT32-NEXT: 0x00013088 00000000 00000000 00000000 00000000
5940

60-
# RELOCGOT64: .rela.dyn {
61-
# RELOCGOT64-NEXT: 0x120D0 R_RISCV_CHERI_CAPABILITY bar 0x0
62-
# RELOCGOT64-NEXT: 0x120E0 R_RISCV_CHERI_CAPABILITY weak 0x0
63-
# RELOCGOT64-NEXT: }
64-
# RELOCGOT64: There is no __cap_relocs section in the file.
65-
# GOT64: section '.got'
66-
# GOT64-NEXT: 0x000120c0 00200100 00000000 00000000 00000000
67-
# GOT64-NEXT: 0x000120d0 00000000 00000000 00000000 00000000
68-
# GOT64-NEXT: 0x000120e0 00000000 00000000 00000000 00000000
69-
70-
# RELOCGOTPLT64: .rela.plt {
71-
# RELOCGOTPLT64-NEXT: 0x13110 R_RISCV_JUMP_SLOT bar 0x0
72-
# RELOCGOTPLT64-NEXT: 0x13120 R_RISCV_JUMP_SLOT weak 0x0
73-
# RELOCGOTPLT64-NEXT: }
74-
# RELOCGOTPLT64: CHERI __cap_relocs [
75-
# RELOCGOTPLT64-NEXT: 0x013110 Base: 0x11030 (<unknown symbol>+0) Length: 64 Perms: Function
76-
# RELOCGOTPLT64-NEXT: 0x013120 Base: 0x11030 (<unknown symbol>+0) Length: 64 Perms: Function
77-
# RELOCGOTPLT64-NEXT: ]
41+
# RELOC64: .rela.plt {
42+
# RELOC64-NEXT: 0x13110 R_RISCV_JUMP_SLOT bar 0x0
43+
# RELOC64-NEXT: 0x13120 R_RISCV_JUMP_SLOT weak 0x0
44+
# RELOC64-NEXT: }
45+
# RELOC64: CHERI __cap_relocs [
46+
# RELOC64-NEXT: 0x013110 Base: 0x11030 (<unknown symbol>+0) Length: 64 Perms: Function
47+
# RELOC64-NEXT: 0x013120 Base: 0x11030 (<unknown symbol>+0) Length: 64 Perms: Function
48+
# RELOC64-NEXT: ]
7849
# GOTPLT64: section '.got.plt'
7950
# GOTPLT64-NEXT: 0x000130f0 00000000 00000000 00000000 00000000
8051
# GOTPLT64-NEXT: 0x00013100 00000000 00000000 00000000 00000000
@@ -98,49 +69,38 @@
9869
# DIS: <foo>:
9970
# DIS-NEXT: 11020:
10071

101-
# DIS: Disassembly of section .plt:
102-
# DIS: <.plt>:
103-
# DISGOT-NEXT: ...
104-
# DISGOTPLT-NEXT: auipcc t2, 2
105-
# DISGOTPLT-NEXT: sub t1, t1, t3
72+
# DIS: Disassembly of section .plt:
73+
# DIS: <.plt>:
74+
# DIS-NEXT: auipcc t2, 2
75+
# DIS-NEXT: sub t1, t1, t3
10676
## 32-bit: .got.plt - .plt = 0x13078 - 0x11030 = 4096*2+72
10777
## 64-bit: .got.plt - .plt = 0x130f0 - 0x11030 = 4096*2+192
108-
# DISGOTPLT32-NEXT: lc t3, 72(t2)
109-
# DISGOTPLT64-NEXT: lc t3, 192(t2)
110-
# DISGOTPLT-NEXT: addi t1, t1, -44
111-
# DISGOTPLT32-NEXT: cincoffset t0, t2, 72
112-
# DISGOTPLT64-NEXT: cincoffset t0, t2, 192
113-
# DISGOTPLT32-NEXT: srli t1, t1, 1
114-
# DISGOTPLT32-NEXT: lc t0, 8(t0)
115-
# DISGOTPLT64-NEXT: lc t0, 16(t0)
116-
# DISGOTPLT-NEXT: jr t3
117-
# DISGOTPLT64-NEXT: nop
78+
# DIS32-NEXT: lc t3, 72(t2)
79+
# DIS64-NEXT: lc t3, 192(t2)
80+
# DIS-NEXT: addi t1, t1, -44
81+
# DIS32-NEXT: cincoffset t0, t2, 72
82+
# DIS64-NEXT: cincoffset t0, t2, 192
83+
# DIS32-NEXT: srli t1, t1, 1
84+
# DIS32-NEXT: lc t0, 8(t0)
85+
# DIS64-NEXT: lc t0, 16(t0)
86+
# DIS-NEXT: jr t3
87+
# DIS64-NEXT: nop
11888

119-
## 32-bit (.got): &.got[bar]-. = 0x12068-0x11050 = 4096*1+24
120-
## 64-bit (.got): &.got[bar]-. = 0x120d0-0x11050 = 4096*1+128
12189
## 32-bit (.got.plt): &.got.plt[bar]-. = 0x13088-0x11050 = 4096*2+56
12290
## 64-bit (.got.plt): &.got.plt[bar]-. = 0x13110-0x11050 = 4096*2+192
123-
# DISGOT: 11050: auipcc t3, 1
124-
# DISGOTPLT: 11050: auipcc t3, 2
125-
# DISGOT32-NEXT: clc t3, 24(t3)
126-
# DISGOT64-NEXT: clc t3, 128(t3)
127-
# DISGOTPLT32-NEXT: lc t3, 56(t3)
128-
# DISGOTPLT64-NEXT: lc t3, 192(t3)
129-
# DIS-NEXT: cjalr t1, t3
130-
# DIS-NEXT: nop
91+
# DIS: 11050: auipcc t3, 2
92+
# DIS32-NEXT: lc t3, 56(t3)
93+
# DIS64-NEXT: lc t3, 192(t3)
94+
# DIS-NEXT: jalr t1, t3
95+
# DIS-NEXT: nop
13196

132-
## 32-bit (.got): &.got[weak]-. = 0x12070-0x11060 = 4096*1+16
133-
## 64-bit (.got): &.got[weak]-. = 0x120e0-0x11060 = 4096*1+128
13497
## 32-bit (.got.plt): &.got.plt[weak]-. = 0x13090-0x11060 = 4096*2+48
13598
## 64-bit (.got.plt): &.got.plt[weak]-. = 0x13120-0x11060 = 4096*2+192
136-
# DISGOT: 11060: auipcc t3, 1
137-
# DISGOTPLT: 11060: auipcc t3, 2
138-
# DISGOT32-NEXT: clc t3, 16(t3)
139-
# DISGOT64-NEXT: clc t3, 128(t3)
140-
# DISGOTPLT32-NEXT: lc t3, 48(t3)
141-
# DISGOTPLT64-NEXT: lc t3, 192(t3)
142-
# DIS-NEXT: cjalr t1, t3
143-
# DIS-NEXT: nop
99+
# DIS: 11060: auipcc t3, 2
100+
# DIS32-NEXT: lc t3, 48(t3)
101+
# DIS64-NEXT: lc t3, 192(t3)
102+
# DIS-NEXT: jalr t1, t3
103+
# DIS-NEXT: nop
144104

145105
.global _start, foo, bar
146106
.weak weak

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