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[CHERIoT] Add preferred instruction aliases for all CHERIoT instructions with a ct. prefix.
This required for conformance with RISC-V vendor extension standards. The prefixed form is preferred for printing when XCheriot is enabled, but the un-prefixed versions are still accepted on input.
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3 files changed

+271
-10
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llvm/lib/Target/RISCV/RISCVFeatures.td

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1400,6 +1400,10 @@ def NotPureCapABI
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def FeatureVendorXCheriot
14011401
: RISCVExtension<1, 0, "Implements XCheriot extension">;
14021402

1403+
def HasCheriot
1404+
: Predicate<"Subtarget->hasVendorXCheriot()">,
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AssemblerPredicate<(all_of FeatureVendorXCheriot), "CHERIoT Extension">;
1406+
14031407
def FeatureRelax
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: SubtargetFeature<"relax", "EnableLinkerRelax", "true",
14051409
"Enable Linker relaxation.">;

llvm/lib/Target/RISCV/RISCVInstrInfoXCheri.td

Lines changed: 154 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -389,6 +389,17 @@ def PseudoCGetAddr : Pseudo<(outs GPR:$rd), (ins GPCR:$cs1), [],
389389
"cgetaddr", "$rd, $cs1">;
390390
}
391391

392+
let Predicates = [HasCheriot] in {
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def : InstAlias<"ct.cgetperm $rd, $rs1", (CGetPerm GPR:$rd, GPCR:$rs1)>;
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def : InstAlias<"ct.cgettype $rd, $rs1", (CGetType GPR:$rd, GPCR:$rs1)>;
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def : InstAlias<"ct.cgetbase $rd, $rs1", (CGetBase GPR:$rd, GPCR:$rs1)>;
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def : InstAlias<"ct.cgetlen $rd, $rs1", (CGetLen GPR:$rd, GPCR:$rs1)>;
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def : InstAlias<"ct.cgettag $rd, $rs1", (CGetTag GPR:$rd, GPCR:$rs1)>;
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def : InstAlias<"ct.cgethigh $rd, $rs1", (CGetHigh GPR:$rd, GPCR:$rs1)>;
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def : InstAlias<"ct.cgettop $rd, $rs1", (CGetTop GPR:$rd, GPCR:$rs1)>;
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def : InstAlias<"ct.cgetaddr $rd, $rs1", (PseudoCGetAddr GPR:$rd, GPCR:$rs1)>;
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}
402+
392403
//===----------------------------------------------------------------------===//
393404
// Capability-Modification Instructions
394405
//===----------------------------------------------------------------------===//
@@ -434,6 +445,43 @@ def : InstAlias<"csetboundsimm $cd, $cs1, $imm",
434445
(CSetBoundsImm GPCR:$cd, GPCR:$cs1, uimm12:$imm), 0>;
435446
}
436447

448+
let Predicates = [HasCheriot] in {
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def : InstAlias<"ct.cseal $rd, $rs1, $rs2", (CSeal GPCR:$rd, GPCR:$rs1,
450+
GPCR:$rs2)>;
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def : InstAlias<"ct.cunseal $rd, $rs1, $rs2", (CUnseal GPCR:$rd, GPCR:$rs1,
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GPCR:$rs2)>;
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def : InstAlias<"ct.candperm $rd, $rs1, $rs2", (CAndPerm GPCR:$rd, GPCR:$rs1,
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GPR:$rs2)>;
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def : InstAlias<"ct.csetaddr $rd, $rs1, $rs2", (CSetAddr GPCR:$rd, GPCR:$rs1,
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GPR:$rs2)>;
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def : InstAlias<"ct.csethigh $rd, $rs1, $rs2", (CSetHigh GPCR:$rd, GPCR:$rs1,
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GPR:$rs2)>;
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def : InstAlias<"ct.cincaddr $rd, $rs1, $rs2",
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(CIncOffset GPCR:$rd, GPCR:$rs1, GPR:$rs2), 0>;
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def : InstAlias<"ct.cincoffset $rd, $rs1, $rs2", (CIncOffset GPCR:$rd,
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GPCR:$rs1, GPR:$rs2)>;
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def : InstAlias<"ct.cincaddr $rd, $rs1, $rs2",
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(CIncOffsetImm GPCR:$rd, GPCR:$rs1, simm12:$rs2), 0>;
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def : InstAlias<"ct.cincoffset $rd, $rs1, $rs2", (CIncOffsetImm GPCR:$rd,
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GPCR:$rs1, simm12:$rs2)>;
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def : InstAlias<"ct.csetbounds $rd, $rs1, $rs2", (CSetBounds GPCR:$rd,
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GPCR:$rs1, GPR:$rs2)>;
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def : InstAlias<"ct.csetboundsexact $rd, $rs1, $rs2",
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(CSetBoundsExact GPCR:$rd, GPCR:$rs1, GPR:$rs2)>;
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def : InstAlias<"ct.csetbounds $rd, $rs1, $rs2", (CSetBoundsImm GPCR:$rd,
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GPCR:$rs1, uimm12:$rs2)>;
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def : InstAlias<"ct.csetboundsrounddown $rd, $rs1, $rs2",
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(CSetBoundsRoundDown GPCR:$rd, GPCR:$rs1, GPR:$rs2)>;
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def : InstAlias<"ct.ccleartag $rd, $rs1", (CClearTag GPCR:$rd, GPCR:$rs1)>;
476+
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def : InstAlias<"ct.cincaddrimm $cd, $cs1, $imm",
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(CIncOffsetImm GPCR:$cd, GPCR:$cs1, simm12:$imm), 0>;
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def : InstAlias<"ct.cincoffsetimm $cd, $cs1, $imm",
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(CIncOffsetImm GPCR:$cd, GPCR:$cs1, simm12:$imm), 0>;
481+
def : InstAlias<"ct.csetboundsimm $cd, $cs1, $imm",
482+
(CSetBoundsImm GPCR:$cd, GPCR:$cs1, uimm12:$imm), 0>;
483+
}
484+
437485
//===----------------------------------------------------------------------===//
438486
// Pointer-Arithmetic Instructions
439487
//===----------------------------------------------------------------------===//
@@ -452,6 +500,12 @@ let isMoveReg = 1, isReMaterializable = 1, isAsCheapAsAMove = 1,
452500
def CMove : Cheri_r<0xa, "cmove", GPCR>;
453501
}
454502

503+
let Predicates = [HasCheriot] in {
504+
def : InstAlias<"ct.cmove $rd, $rs1", (CMove GPCR:$rd, GPCR:$rs1)>;
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def : InstAlias<"ct.csub $rd, $rs1, $rs2", (PseudoCSub GPR:$rd, GPCR:$rs1,
506+
GPCR:$rs2)>;
507+
}
508+
455509
//===----------------------------------------------------------------------===//
456510
// Control-Flow Instructions
457511
//===----------------------------------------------------------------------===//
@@ -490,6 +544,15 @@ def CSEQX : Cheri_rr<0x21, "csetequalexact", GPR, GPCR, GPCR>;
490544
def : InstAlias<"cseqx $rd, $cs1, $cs2", (CSEQX GPR:$rd, GPCR:$cs1, GPCR:$cs2)>;
491545
}
492546

547+
let Predicates = [HasCheriot] in {
548+
def : InstAlias<"ct.ctestsubset $rd, $rs1, $rs2",
549+
(CTestSubset GPR:$rd, GPCRC0IsDDC:$rs1, GPCR:$rs2)>;
550+
def : InstAlias<"ct.csetequalexact $rd, $rs1, $rs2",
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(CSEQX GPR:$rd, GPCR:$rs1, GPCR:$rs2), 0>;
552+
def : InstAlias<"ct.cseqx $rd, $cs1, $cs2",
553+
(CSEQX GPR:$rd, GPCR:$cs1, GPCR:$cs2), 2>;
554+
}
555+
493556
//===----------------------------------------------------------------------===//
494557
// Special Capabilty Register Access Instructions
495558
//===----------------------------------------------------------------------===//
@@ -506,6 +569,15 @@ def : InstAlias<"cspecialw $scr, $cs",
506569
(CSpecialRW C0, special_capreg:$scr, GPCRNoC0:$cs)>;
507570
}
508571

572+
let Predicates = [HasCheriot] in {
573+
def : InstAlias<"ct.cspecialrw $rd, $imm5, $rs1",
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(CSpecialRW GPCR:$rd, special_capreg:$imm5, GPCR:$rs1)>;
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def : InstAlias<"ct.cspecialr $cd, $scr",
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(CSpecialRW GPCR:$cd, special_capreg:$scr, C0), 2>;
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def : InstAlias<"ct.cspecialw $scr, $cs",
578+
(CSpecialRW C0, special_capreg:$scr, GPCRNoC0:$cs), 2>;
579+
}
580+
509581
//===----------------------------------------------------------------------===//
510582
// Fast Register-Clearing Instructions
511583
//===----------------------------------------------------------------------===//
@@ -527,6 +599,16 @@ def : InstAlias<"crrl $rd, $rs1", (CRRL GPR:$rd, GPR:$rs1)>;
527599
def : InstAlias<"cram $rd, $rs1", (CRAM GPR:$rd, GPR:$rs1)>;
528600
}
529601

602+
let Predicates = [HasCheriot] in {
603+
def : InstAlias<"ct.croundrepresentablelength $rd, $rs1", (CRRL GPR:$rd,
604+
GPR:$rs1)>;
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def : InstAlias<"ct.crepresentablealignmentmask $rd, $rs1", (CRAM GPR:$rd,
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GPR:$rs1)>;
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def : InstAlias<"ct.crrl $rd, $rs1", (CRRL GPR:$rd, GPR:$rs1), 2>;
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def : InstAlias<"ct.cram $rd, $rs1", (CRAM GPR:$rd, GPR:$rs1), 2>;
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}
611+
530612
//===----------------------------------------------------------------------===//
531613
// Tag-Memory Access Instructions
532614
//===----------------------------------------------------------------------===//
@@ -786,6 +868,36 @@ def : InstAlias<"cjalr $rs, $offset", (CJALR C1, GPCR:$rs, simm12:$of
786868
def : InstAlias<"cjalr $rd, $rs, $offset", (CJALR GPCR:$rd, GPCR:$rs, simm12:$offset), 0>;
787869
} // Predicates = [HasCheri, IsCapMode]
788870

871+
let Predicates = [HasCheriot] in {
872+
def : InstAlias<"ct.auipcc $rd, $imm20", (AUIPCC GPCR:$rd,
873+
uimm20_auipc:$imm20)>;
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def : InstAlias<"ct.auicgp $rd, $imm20", (AUICGP GPCR:$rd,
875+
uimm20_auigp:$imm20)>;
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def : InstAlias<"ct.cjal $rd, $imm20", (CJAL GPCR:$rd,
877+
simm21_lsb0_jal:$imm20)>;
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def : InstAlias<"ct.cjalr $rd, ${imm12}(${rs1})", (CJALR GPCR:$rd, GPCR:$rs1,
879+
simm12:$imm12)>;
880+
881+
def : InstAlias<"ct.cjal $offset", (CJAL C1, simm21_lsb0_jal:$offset), 2>;
882+
def : InstAlias<"ct.cj $offset", (CJAL C0, simm21_lsb0_jal:$offset), 0>;
883+
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def : InstAlias<"ct.cjr $rs", (CJALR C0, GPCR:$rs, 0), 8>;
885+
def : InstAlias<"ct.cjr ${offset}(${rs})",
886+
(CJALR C0, GPCR:$rs, simm12:$offset), 5>;
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def : InstAlias<"ct.cjalr $rs", (CJALR C1, GPCR:$rs, 0), 8>;
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def : InstAlias<"ct.cjalr ${offset}(${rs})",
889+
(CJALR C1, GPCR:$rs, simm12:$offset), 5>;
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def : InstAlias<"ct.cjalr $rd, $rs", (CJALR GPCR:$rd, GPCR:$rs, 0), 7>;
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def : InstAlias<"ct.cret", (CJALR C0, C1, 0), 9>;
892+
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def : InstAlias<"ct.cjr $rs, $offset", (CJALR C0, GPCR:$rs, simm12:$offset),
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0>;
895+
def : InstAlias<"ct.cjalr $rs, $offset", (CJALR C1, GPCR:$rs, simm12:$offset),
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0>;
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def : InstAlias<"ct.cjalr $rd, $rs, $offset",
898+
(CJALR GPCR:$rd, GPCR:$rs, simm12:$offset), 0>;
899+
}
900+
789901
// Expands to an instruction alias with and without a c prefix for loads/stores
790902
multiclass CPrefixedInstAlias<string Asm, dag Result> {
791903
def : InstAlias<"c" # Asm, Result, 0>;
@@ -805,6 +917,26 @@ defm CSH : CheriStore_ri<0b001, "sh">;
805917
defm CSW : CheriStore_ri<0b010, "sw">;
806918
} // Predicates = [HasCheri, IsCapMode]
807919

920+
let Predicates = [HasCheriot] in {
921+
def : InstAlias<"ct.clb $rd, ${imm12}(${rs1})", (CLB GPR:$rd, GPCR:$rs1,
922+
simm12:$imm12)>;
923+
def : InstAlias<"ct.clh $rd, ${imm12}(${rs1})", (CLH GPR:$rd, GPCR:$rs1,
924+
simm12:$imm12)>;
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def : InstAlias<"ct.clw $rd, ${imm12}(${rs1})", (CLW GPR:$rd, GPCR:$rs1,
926+
simm12:$imm12)>;
927+
def : InstAlias<"ct.clbu $rd, ${imm12}(${rs1})", (CLBU GPR:$rd, GPCR:$rs1,
928+
simm12:$imm12)>;
929+
def : InstAlias<"ct.clhu $rd, ${imm12}(${rs1})", (CLHU GPR:$rd, GPCR:$rs1,
930+
simm12:$imm12)>;
931+
932+
def : InstAlias<"ct.csb $rs2, ${imm12}(${rs1})", (CSB GPR:$rs2, GPCR:$rs1,
933+
simm12:$imm12)>;
934+
def : InstAlias<"ct.csh $rs2, ${imm12}(${rs1})", (CSH GPR:$rs2, GPCR:$rs1,
935+
simm12:$imm12)>;
936+
def : InstAlias<"ct.csw $rs2, ${imm12}(${rs1})", (CSW GPR:$rs2, GPCR:$rs1,
937+
simm12:$imm12)>;
938+
}
939+
808940
let Predicates = [HasCheri, IsRV64, IsCapMode] in {
809941
defm CLWU : CheriLoad_ri<0b110, "lwu">;
810942
defm CLD : CheriLoad_ri<0b011, "ld">;
@@ -834,6 +966,13 @@ defm : CPrefixedInstAlias<"sc $rs2, (${rs1})",
834966
(CSC_64 GPCR:$rs2, GPCR:$rs1, 0)>;
835967
}
836968

969+
let Predicates = [HasCheriot] in {
970+
def : InstAlias<"ct.clc $rd, ${imm12}(${rs1})", (CLC_64 GPCR:$rd, GPCR:$rs1,
971+
simm12:$imm12)>;
972+
def : InstAlias<"ct.csc $rd, ${imm12}(${rs1})", (CSC_64 GPCR:$rd, GPCR:$rs1,
973+
simm12:$imm12)>;
974+
}
975+
837976
let Predicates = [HasCheri, IsRV64, IsCapMode] in {
838977
let DecoderNamespace = "CapModeOnly_",
839978
hasSideEffects = 0, mayLoad = 1, mayStore = 0 in
@@ -1884,6 +2023,12 @@ def PseudoCCALL : Pseudo<(outs), (ins cap_call_symbol:$func), []> {
18842023
let AsmString = "ccall\t$func";
18852024
}
18862025

2026+
let Predicates = [HasCheriot] in {
2027+
def : InstAlias<"ct.ccall $rd, $func", (PseudoCCALLReg GPCR:$rd,
2028+
cap_call_symbol:$func)>;
2029+
def : InstAlias<"ct.ccall $func", (PseudoCCALL cap_call_symbol:$func)>;
2030+
}
2031+
18872032
// The PseudoCompartmentCall of expands to AUIPCC, CLC_64, C_CJALR (10 bytes),
18882033
// but the setup to obtain the callee capability from an import table can
18892034
// require up to 8 additional bytes.
@@ -1932,6 +2077,10 @@ def PseudoCTAIL : Pseudo<(outs), (ins cap_call_symbol:$dst), []> {
19322077
let AsmString = "ctail\t$dst";
19332078
}
19342079

2080+
let Predicates = [HasCheriot] in def : InstAlias<
2081+
"ct.ctail $dst",
2082+
(PseudoCTAIL cap_call_symbol:$dst)>;
2083+
19352084
let Predicates = [HasCheri, IsCapMode, IsPureCapABI],
19362085
isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [C2] in
19372086
def PseudoCTAILIndirect : Pseudo<(outs), (ins GPCRNoC0C1:$rs1),
@@ -1953,6 +2102,11 @@ def PseudoCJump : Pseudo<(outs GPCR:$rd),
19532102
let AsmString = "cjump\t$target, $rd";
19542103
}
19552104

2105+
let Predicates = [HasCheriot] in def : InstAlias<
2106+
"ct.cjump $target, $rd",
2107+
(PseudoCJump GPCR:$rd,
2108+
pseudo_cap_jump_symbol:$target)>;
2109+
19562110
defm : CheriLdPat<sextloadi8, CLB>, Requires<[HasCheri, IsCapMode]>;
19572111
defm : CheriLdPat<extloadi8, CLB>, Requires<[HasCheri, IsCapMode]>;
19582112
defm : CheriLdPat<sextloadi16, CLH>, Requires<[HasCheri, IsCapMode]>;

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