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davidchisnallresistor
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Fix large immediate displacements for AUICGP / AUIPCC.
This is the same displacement check as used elsewhere, but I'm not sure that it's actually right. The previous one was nonsense because it was ignoring the shift.
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lld/ELF/Arch/RISCV.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -695,7 +695,7 @@ void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
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warn("R_RISCV_CHERIOT_COMPARTMENT_HI relocation applied to instruction "
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"with unexpected opcode " +
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Twine(existingOpcode));
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checkInt(loc, val, 20, rel);
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checkInt(loc, SignExtend64(val + 0x800, bits) >> 12, 20, rel);
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// Preserve the target register. We will rewrite the opcode (source
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// register) to either AUICGP or AUIPCC and set the immediate field.
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uint32_t insn = read32le(loc) & 0x00000f80;

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