[squashme] Add llvm.launder.alignment intrinsic and use that to lower cheri_address_get

Author: xdoardo

clang/lib/CodeGen/CGBuiltin.cpp

@@ -6030,7 +6030,8 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
     const auto *Arg = E->getArg(0);
     auto *RArg = EmitScalarExpr(Arg);
     if (Arg->getType()->isCHERISealedCapabilityType(getContext()))
-      RArg = Builder.CreateLaunderInvariantGroup(RArg);
+      RArg = Builder.CreateIntrinsic(llvm::Intrinsic::launder_alignment,
+                                     {UnqualPtrTy}, {RArg});
     return RValue::get(Builder.CreateIntrinsic(
         llvm::Intrinsic::cheri_cap_address_get, {IntPtrTy}, {RArg}));
   }

clang/test/CodeGen/cheri/riscv/cheriot-static-sealed-value-attr.c

@@ -40,7 +40,7 @@ void func() {
 // This is because the CHERIoT RTOS uses the lower bits of the address to store the permissions of the sealed capability, and KnownBits can in turn 
 // optimise away logical computations on lower parts of the address.
 
-// CHECK:  %0 = tail call ptr addrspace(200) @llvm.launder.invariant.group.p200(ptr addrspace(200) nonnull @Obj1)
+// CHECK:  %0 = tail call ptr addrspace(200) @llvm.launder.alignment.p200(ptr addrspace(200) nonnull @Obj1)
 // CHECK:  %1 = tail call i32 @llvm.cheri.cap.address.get.i32(ptr addrspace(200) nonnull %0)
 // CHECK:  tail call void @doSomethingWithAddr(i32 noundef %1) #5
   doSomethingWithAddr(__builtin_cheri_address_get(&Obj1));
@@ -51,6 +51,6 @@ void func() {
 
 // CHECK: declare void @doSomething(ptr addrspace(200) noundef) local_unnamed_addr addrspace(200) #2
 // CHECK: declare void @doSomethingWithAddr(i32 noundef) local_unnamed_addr addrspace(200) #2
-// CHECK: declare ptr addrspace(200) @llvm.launder.invariant.group.p200(ptr addrspace(200)) addrspace(200) #3
+// CHECK: declare ptr addrspace(200) @llvm.launder.alignment.p200(ptr addrspace(200)) addrspace(200) #3
 // CHECK: declare i32 @llvm.cheri.cap.address.get.i32(ptr addrspace(200)) addrspace(200) #4
 // CHECK: declare void @doSomething2(ptr addrspace(200) noundef) local_unnamed_addr addrspace(200) #2

llvm/include/llvm/IR/Intrinsics.td

@@ -1699,6 +1699,10 @@ def int_strip_invariant_group : DefaultAttrsIntrinsic<[llvm_anyptr_ty],
                                           [LLVMMatchType<0>],
                                           [IntrSpeculatable, IntrNoMem]>;
 
+def int_launder_alignment : DefaultAttrsIntrinsic<[llvm_anyptr_ty],
+                                            [LLVMMatchType<0>],
+                                            [IntrInaccessibleMemOnly, IntrSpeculatable]>;
+
 //===------------------------ Stackmap Intrinsics -------------------------===//
 //
 def int_experimental_stackmap : DefaultAttrsIntrinsic<[],

llvm/lib/Analysis/ValueTracking.cpp

@@ -6757,6 +6757,7 @@ bool llvm::isIntrinsicReturningPointerAliasingArgumentWithoutCapturing(
   // MustPreserveNullness (and, at time of writing, they are not), but we
   // document this fact out of an abundance of caution.
   case Intrinsic::amdgcn_make_buffer_rsrc:
+  case Intrinsic::launder_alignment:
     return true;
   case Intrinsic::ptrmask:
     return !MustPreserveNullness;

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

@@ -7463,6 +7463,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
   case Intrinsic::annotation:
   case Intrinsic::ptr_annotation:
   case Intrinsic::launder_invariant_group:
+  case Intrinsic::launder_alignment:
   case Intrinsic::strip_invariant_group:
     // Drop the intrinsic, but forward the value
     setValue(&I, getValue(I.getOperand(0)));