Skip to content

Commit f5b8628

Browse files
jrtc27resistor
authored andcommitted
[RISCV] Enable a test that works these days
1 parent ebe98ff commit f5b8628

File tree

1 file changed

+3
-4
lines changed

1 file changed

+3
-4
lines changed

llvm/test/CodeGen/RISCV/cheri/double-imm.ll

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,9 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; Check that .LCPI symbols have a size associated with them.
3-
; TODO: Enable once BuildPairF64 works for purecap
4-
; RUNNOT: %riscv32_cheri_purecap_llc -mattr=+d -verify-machineinstrs < %s \
5-
; RUNNOT: | FileCheck --check-prefix=CHECK,IL32PC64 %s
3+
; RUN: %riscv32_cheri_purecap_llc -mattr=+d -verify-machineinstrs < %s \
4+
; RUN: | FileCheck %s
65
; RUN: %riscv64_cheri_purecap_llc -mattr=+d -verify-machineinstrs < %s \
7-
; RUN: | FileCheck --check-prefixes=CHECK,L64PC128 %s --allow-unused-prefixes
6+
; RUN: | FileCheck %s
87

98
; CHECK-LABEL: .rodata.cst8,"aM",@progbits,8
109
; CHECK-NEXT: .p2align 3

0 commit comments

Comments
 (0)