From 23c5531c8f8f12a37e80257020074bfb6776513a Mon Sep 17 00:00:00 2001 From: James Wainwright Date: Sun, 23 Mar 2025 20:56:27 +0000 Subject: [PATCH] [cheriot] Enable RVE elf flag for cheriot ABIs This must match other objects that have `EF_RISCV_RVE` set in their ELF header. CHERIoT targets use XLEN=16 (E). --- llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp | 4 ++-- llvm/test/Object/RISCV/cheriot-elf-flags.ll | 4 ++++ 2 files changed, 6 insertions(+), 2 deletions(-) create mode 100644 llvm/test/Object/RISCV/cheriot-elf-flags.ll diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp index ec93a0a240970..862a295edba07 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp @@ -109,8 +109,6 @@ void RISCVTargetELFStreamer::finish() { break; case RISCVABI::ABI_IL32PC64: case RISCVABI::ABI_L64PC128: - case RISCVABI::ABI_CHERIOT: - case RISCVABI::ABI_CHERIOT_BAREMETAL: EFlags |= ELF::EF_RISCV_CHERIABI; break; case RISCVABI::ABI_ILP32F: @@ -136,6 +134,8 @@ void RISCVTargetELFStreamer::finish() { EFlags |= ELF::EF_RISCV_RVE; break; case RISCVABI::ABI_IL32PC64E: + case RISCVABI::ABI_CHERIOT: + case RISCVABI::ABI_CHERIOT_BAREMETAL: EFlags |= ELF::EF_RISCV_RVE; EFlags |= ELF::EF_RISCV_CHERIABI; break; diff --git a/llvm/test/Object/RISCV/cheriot-elf-flags.ll b/llvm/test/Object/RISCV/cheriot-elf-flags.ll new file mode 100644 index 0000000000000..71cfad48fcd30 --- /dev/null +++ b/llvm/test/Object/RISCV/cheriot-elf-flags.ll @@ -0,0 +1,4 @@ +; RUN: llc --filetype=obj -mtriple=riscv32-unknown-unknown -mcpu=cheriot -target-abi cheriot %s -o - | llvm-readelf --file-header - | FileCheck %s + +; Ensure CHERIoT targets have the correct ELF flags. +; CHECK: Flags: 0x30009, RVC, RVE, cheriabi, capability mode