From 7988fcad5b9ff891b48b2aed099c1e70920c192f Mon Sep 17 00:00:00 2001 From: Owen Anderson Date: Wed, 30 Apr 2025 23:01:06 +1200 Subject: [PATCH] [CHERIoT] Add an ELF flag for RISCV_CHERIOT. --- lld/ELF/Arch/RISCV.cpp | 4 +++ llvm/include/llvm/BinaryFormat/ELF.h | 1 + llvm/lib/ObjectYAML/ELFYAML.cpp | 1 + .../RISCV/MCTargetDesc/RISCVELFStreamer.cpp | 8 +++-- .../CodeGen/RISCV/cheri/cheriot-elf-flags.ll | 32 +++++++++++++++++++ llvm/tools/llvm-readobj/ELFDumper.cpp | 18 ++++++----- 6 files changed, 54 insertions(+), 10 deletions(-) create mode 100644 llvm/test/CodeGen/RISCV/cheri/cheriot-elf-flags.ll diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp index b20c04b7c24c6..9e2786cc1221f 100644 --- a/lld/ELF/Arch/RISCV.cpp +++ b/lld/ELF/Arch/RISCV.cpp @@ -192,6 +192,10 @@ uint32_t RISCV::calcEFlags() const { if ((eflags & EF_RISCV_CAP_MODE) != (target & EF_RISCV_CAP_MODE)) Err(ctx) << f << ": cannot link object files with different EF_RISCV_CAP_MODE"; + + if ((eflags & EF_RISCV_CHERIOT) != (target & EF_RISCV_CHERIOT)) + Err(ctx) << f + << ": cannot link object files with different EF_RISCV_CHERIOT"; } return target; diff --git a/llvm/include/llvm/BinaryFormat/ELF.h b/llvm/include/llvm/BinaryFormat/ELF.h index 99797794f659d..14847538ab502 100644 --- a/llvm/include/llvm/BinaryFormat/ELF.h +++ b/llvm/include/llvm/BinaryFormat/ELF.h @@ -702,6 +702,7 @@ enum : unsigned { // CHERI-specific flags EF_RISCV_CHERIABI = 0x00010000, EF_RISCV_CAP_MODE = 0x00020000, + EF_RISCV_CHERIOT = 0x00040000, }; // ELF Relocation types for RISC-V diff --git a/llvm/lib/ObjectYAML/ELFYAML.cpp b/llvm/lib/ObjectYAML/ELFYAML.cpp index e75ffa60876de..526c76c411b5e 100644 --- a/llvm/lib/ObjectYAML/ELFYAML.cpp +++ b/llvm/lib/ObjectYAML/ELFYAML.cpp @@ -555,6 +555,7 @@ void ScalarBitSetTraits::bitset(IO &IO, BCase(EF_RISCV_TSO); BCase(EF_RISCV_CHERIABI); BCase(EF_RISCV_CAP_MODE); + BCase(EF_RISCV_CHERIOT); break; case ELF::EM_SPARC32PLUS: BCase(EF_SPARC_32PLUS); diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp index b2a079cb288b9..3b8ebaa281a34 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp @@ -103,10 +103,14 @@ void RISCVTargetELFStreamer::finish() { case RISCVABI::ABI_ILP32: case RISCVABI::ABI_LP64: break; - case RISCVABI::ABI_IL32PC64: - case RISCVABI::ABI_L64PC128: case RISCVABI::ABI_CHERIOT: case RISCVABI::ABI_CHERIOT_BAREMETAL: + EFlags |= ELF::EF_RISCV_RVE; + EFlags |= ELF::EF_RISCV_CHERIABI; + EFlags |= ELF::EF_RISCV_CHERIOT; + break; + case RISCVABI::ABI_IL32PC64: + case RISCVABI::ABI_L64PC128: EFlags |= ELF::EF_RISCV_CHERIABI; break; case RISCVABI::ABI_ILP32F: diff --git a/llvm/test/CodeGen/RISCV/cheri/cheriot-elf-flags.ll b/llvm/test/CodeGen/RISCV/cheri/cheriot-elf-flags.ll new file mode 100644 index 0000000000000..c0cc45836a063 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/cheri/cheriot-elf-flags.ll @@ -0,0 +1,32 @@ +; RUN: llc --filetype=obj --mcpu=cheriot --mtriple=riscv32-unknown-unknown -target-abi cheriot %s -mattr=+xcheri,+cap-mode -o - | llvm-readelf -a - | FileCheck %s + +; CHECK-LABEL: ELF Header: +; CHECK: Flags: 0x70009, RVC, RVE, cheriabi, capability mode, cheriot + +target datalayout = "e-m:e-pf200:64:64:64:32-p:32:32-i64:64-n32-S128-A200-P200-G200" +target triple = "riscv32cheriot-unknown-cheriotrtos" + + +define void @foo() addrspace(200) #0 { +entry: + ret void +} + +attributes #0 = { minsize mustprogress nounwind optsize "frame-pointer"="none" "min-legal-vector-width"="0" "no-builtins" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cheriot" "target-features"="+relax,+xcheri,-64bit,-save-restore" } + +!llvm.linker.options = !{} +!llvm.module.flags = !{!0, !1, !2} +!llvm.ident = !{!3} + +!0 = !{i32 1, !"wchar_size", i32 2} +!1 = !{i32 1, !"target-abi", !"cheriot"} +!2 = !{i32 1, !"SmallDataLimit", i32 8} +!3 = !{!"clang version 13.0.0 (ssh://git@github.com/CHERIoT-Platform/llvm-project 42ccdb1bcc7eb0bf8cc8e493850359f828515495)"} +!4 = !{i64 0, i64 4, !5, i64 4, i64 4, !5, i64 8, i64 4, !5} +!5 = !{!6, !6, i64 0} +!6 = !{!"int", !7, i64 0} +!7 = !{!"omnipotent char", !8, i64 0} +!8 = !{!"Simple C++ TBAA"} +!9 = !{i64 0, i64 128, !10} +!10 = !{!7, !7, i64 0} + diff --git a/llvm/tools/llvm-readobj/ELFDumper.cpp b/llvm/tools/llvm-readobj/ELFDumper.cpp index dab84fed9c661..91b3acd4905be 100644 --- a/llvm/tools/llvm-readobj/ELFDumper.cpp +++ b/llvm/tools/llvm-readobj/ELFDumper.cpp @@ -1688,14 +1688,16 @@ const EnumEntry ElfHeaderNVPTXFlags[] = { }; const EnumEntry ElfHeaderRISCVFlags[] = { - ENUM_ENT(EF_RISCV_RVC, "RVC"), - ENUM_ENT(EF_RISCV_FLOAT_ABI_SINGLE, "single-float ABI"), - ENUM_ENT(EF_RISCV_FLOAT_ABI_DOUBLE, "double-float ABI"), - ENUM_ENT(EF_RISCV_FLOAT_ABI_QUAD, "quad-float ABI"), - ENUM_ENT(EF_RISCV_RVE, "RVE"), - ENUM_ENT(EF_RISCV_TSO, "TSO"), - ENUM_ENT(EF_RISCV_CHERIABI, "cheriabi"), - ENUM_ENT(EF_RISCV_CAP_MODE, "capability mode"), + ENUM_ENT(EF_RISCV_RVC, "RVC"), + ENUM_ENT(EF_RISCV_FLOAT_ABI_SINGLE, "single-float ABI"), + ENUM_ENT(EF_RISCV_FLOAT_ABI_DOUBLE, "double-float ABI"), + ENUM_ENT(EF_RISCV_FLOAT_ABI_QUAD, "quad-float ABI"), + ENUM_ENT(EF_RISCV_RVE, "RVE"), + ENUM_ENT(EF_RISCV_TSO, "TSO"), + ENUM_ENT(EF_RISCV_CHERIABI, "cheriabi"), + ENUM_ENT(EF_RISCV_CAP_MODE, "capability mode"), + ENUM_ENT(EF_RISCV_CHERIOT, "cheriot"), + }; const EnumEntry ElfHeaderSPARCFlags[] = {