diff --git a/llvm/include/llvm/Target/TargetMachine.h b/llvm/include/llvm/Target/TargetMachine.h
index 9bdb110bd3683..30abd1f21daa4 100644
--- a/llvm/include/llvm/Target/TargetMachine.h
+++ b/llvm/include/llvm/Target/TargetMachine.h
@@ -203,6 +203,8 @@ class TargetMachine {
     return DL.getPointerSize(DL.getAllocaAddrSpace());
   }
 
+  bool hasCheriCapabilities() const { return DL.hasCheriCapabilities(); }
+
   /// Reset the target options based on the function's attributes.
   // FIXME: Remove TargetOptions that affect per-function code generation
   // from TargetMachine.
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index 4ecf06b5540c3..135dbbac2810e 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -510,10 +510,10 @@ bool RISCVPassConfig::addPreISel() {
     addPass(createBarrierNoopPass());
   }
 
-  bool isCheriot =
-      TM->getTargetTriple().getSubArch() == Triple::RISCV32SubArch_cheriot_v1;
-  if ((TM->getOptLevel() != CodeGenOptLevel::None && !isCheriot &&
-       EnableGlobalMerge == cl::BOU_UNSET) ||
+  // XXX: GlobalMerge is undesirable on CHERI, as it makes the bounds on globals
+  // excessively loose.
+  if ((TM->getOptLevel() != CodeGenOptLevel::None &&
+       !TM->hasCheriCapabilities() && EnableGlobalMerge == cl::BOU_UNSET) ||
       EnableGlobalMerge == cl::BOU_TRUE) {
     // FIXME: Like AArch64, we disable extern global merging by default due to
     // concerns it might regress some workloads. Unlike AArch64, we don't