drivers: serial: CAT1 UART driver: fix HW flow control

fix HW flow control:
- remove cyhal_uart_enable_flow_control
- added Cy_SCB_UART_EnableCts if cfg->flow_ctrl = true
  (required to enable hw flow control)
- configuration of CTS/RTS done by pincntr driver

(cherry picked from commit b6d0958)

Original-Signed-off-by: Nazar Palamar <[email protected]>
GitOrigin-RevId: b6d0958
Change-Id: If19e56c8ba71d71c50e175cd0fd6f352ddc868ac
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/zephyr/+/5650213
Tested-by: Ting Shen <[email protected]>
Tested-by: ChromeOS Prod (Robot) <[email protected]>
Reviewed-by: Ting Shen <[email protected]>
Commit-Queue: Ting Shen <[email protected]>

Author: npal-cy

drivers/serial/uart_ifx_cat1.c

@@ -233,7 +233,7 @@ static int ifx_cat1_uart_configure(const struct device *dev,
 
 	/* Enable RTS/CTS flow control */
 	if ((result == CY_RSLT_SUCCESS) && cfg->flow_ctrl) {
-		result = cyhal_uart_enable_flow_control(&data->obj, true, true);
+		Cy_SCB_UART_EnableCts(data->obj.base);
 	}
 
 	return (result == CY_RSLT_SUCCESS) ? 0 : -ENOTSUP;
@@ -437,6 +437,11 @@ static int ifx_cat1_uart_init(const struct device *dev)
 		.resource = &data->hw_resource,
 		.config = &_cyhal_uart_default_config,
 		.clock = &data->clock,
+		.gpios = {
+			.pin_tx  = NC,
+			.pin_rts = NC,
+			.pin_cts = NC,
+		},
 	};
 
 	/* Dedicate SCB HW resource */