boards: imx943_evk: a55: update document about dcache

Update board document to remove dcache off command under U-Boot as
CONFIG_ARM64_BOOT_DISABLE_DCACHE has been enabled.

(cherry picked from commit cfc6527)

Original-Signed-off-by: Jiafei Pan <[email protected]>
GitOrigin-RevId: cfc6527
Cr-Build-Id: 8711840798614211969
Cr-Build-Url: https://cr-buildbucket.appspot.com/build/8711840798614211969
Copybot-Job-Name: zephyr-main-copybot-downstream
Change-Id: I4fe5e3ce62a3dd4f5629dda038cb895ee3413347
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/zephyr/+/6650437
Tested-by: ChromeOS Copybot <[email protected]>
Commit-Queue: Yuval Peress <[email protected]>
Reviewed-by: Yuval Peress <[email protected]>
Tested-by: Yuval Peress <[email protected]>

Author: Jiafei Pan

boards/nxp/imx943_evk/doc/index.rst

@@ -83,13 +83,9 @@ Setup
 
 The default runner for the board is JLink, connect the EVK board's JTAG connector to
 the host computer using a J-Link debugger, power up the board and stop the board at
-U-Boot command line, execute the following U-boot command to disable D-Cache:
+U-Boot command line.
 
-.. code-block:: console
-
-    dcache off
-
-then use "west flash" or "west debug" command to load the zephyr.bin
+Then use "west flash" or "west debug" command to load the zephyr.bin
 image from the host computer and start the Zephyr application on A55 core0.
 
 Flash and Run
@@ -168,7 +164,7 @@ Use the following command to boot Zephyr on the core0:
 
 .. code-block:: console
 
-    dcache off; icache flush; go 0xd0000000;
+    dcache flush; icache flush; go 0xd0000000;
 
 Then the following log could be found on UART1 console: