diff --git a/demos/AT32/RT-AT-START-F415/.cproject b/demos/AT32/RT-AT-START-F415/.cproject index 74701160a0..eb5b865774 100644 --- a/demos/AT32/RT-AT-START-F415/.cproject +++ b/demos/AT32/RT-AT-START-F415/.cproject @@ -37,7 +37,7 @@ - + @@ -48,7 +48,7 @@ - + diff --git a/demos/AT32/RT-AT-START-F415/Makefile b/demos/AT32/RT-AT-START-F415/Makefile index 289af6d294..92e53fc510 100644 --- a/demos/AT32/RT-AT-START-F415/Makefile +++ b/demos/AT32/RT-AT-START-F415/Makefile @@ -105,7 +105,7 @@ include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_at32f415.mk # HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/AT32F415/platform.mk include $(CHIBIOS_CONTRIB)/os/hal/boards/AT_START_F415/board.mk include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk diff --git a/demos/AT32/RT-AT-START-F415/cfg/config.h b/demos/AT32/RT-AT-START-F415/cfg/config.h index 4fbd7cc3df..361e185d9c 100644 --- a/demos/AT32/RT-AT-START-F415/cfg/config.h +++ b/demos/AT32/RT-AT-START-F415/cfg/config.h @@ -1,5 +1,4 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio ChibiOS - Copyright (C) 2023..2024 HorrorTroll ChibiOS - Copyright (C) 2023..2024 Zhaqian @@ -16,6 +15,16 @@ limitations under the License. */ +/* + * CRC driver system settings. + */ +#define AT32_CRC_USE_CRC1 FALSE + +#define CRC_USE_DMA FALSE +#define AT32_CRC_CRC1_DMA_PRIORITY 2 +#define AT32_CRC_CRC1_IRQ_PRIORITY 5 +#define AT32_CRC_CRC1_DMA_STREAM AT32_DMA1_STREAM2 + /* * I2C fallback driver system settings. */ diff --git a/demos/AT32/RT-AT-START-F415/cfg/halconf.h b/demos/AT32/RT-AT-START-F415/cfg/halconf.h index 379afbbea6..2e7a8067b9 100644 --- a/demos/AT32/RT-AT-START-F415/cfg/halconf.h +++ b/demos/AT32/RT-AT-START-F415/cfg/halconf.h @@ -550,6 +550,8 @@ #define WSPI_USE_MUTUAL_EXCLUSION TRUE #endif +#include "halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/demos/AT32/RT-AT-START-F415/cfg/halconf_community.h b/demos/AT32/RT-AT-START-F415/cfg/halconf_community.h new file mode 100644 index 0000000000..c43d668764 --- /dev/null +++ b/demos/AT32/RT-AT-START-F415/cfg/halconf_community.h @@ -0,0 +1,182 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the COMP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the OPAMP subsystem. + */ +#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__) +#define HAL_USE_OPAMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/AT32/RT-AT-START-F415/cfg/mcuconf.h b/demos/AT32/RT-AT-START-F415/cfg/mcuconf.h index 5afedd79a1..708b5513df 100644 --- a/demos/AT32/RT-AT-START-F415/cfg/mcuconf.h +++ b/demos/AT32/RT-AT-START-F415/cfg/mcuconf.h @@ -63,7 +63,7 @@ #define AT32_USBDIV AT32_USBDIV_DIV3 #define AT32_CLKOUT_SEL AT32_CLKOUT_SEL_NOCLOCK #define AT32_CLKOUTDIV AT32_CLKOUTDIV_DIV1 -#define AT32_ERTCSEL AT32_ERTCSEL_HEXTDIV +#define AT32_ERTCSEL AT32_ERTCSEL_NOCLOCK #define AT32_PVM_ENABLE FALSE #define AT32_PVMSEL AT32_PVMSEL_LEV1 @@ -136,10 +136,10 @@ #define AT32_I2C_USE_I2C1 FALSE #define AT32_I2C_USE_I2C2 FALSE #define AT32_I2C_BUSY_TIMEOUT 50 -#define AT32_I2C_I2C1_IRQ_PRIORITY 5 -#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_I2C1_DMA_PRIORITY 3 #define AT32_I2C_I2C2_DMA_PRIORITY 3 +#define AT32_I2C_I2C1_IRQ_PRIORITY 5 +#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* @@ -216,9 +216,13 @@ #define AT32_UART_USE_USART1 FALSE #define AT32_UART_USE_USART2 FALSE #define AT32_UART_USE_USART3 FALSE +#define AT32_UART_USE_UART4 FALSE +#define AT32_UART_USE_UART5 FALSE #define AT32_UART_USART1_DMA_PRIORITY 0 #define AT32_UART_USART2_DMA_PRIORITY 0 #define AT32_UART_USART3_DMA_PRIORITY 0 +#define AT32_UART_UART4_DMA_PRIORITY 0 +#define AT32_UART_UART5_DMA_PRIORITY 0 #define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* diff --git a/demos/AT32/RT-AT-START-F415/main.c b/demos/AT32/RT-AT-START-F415/main.c index fc991eb7a8..bca19993a3 100644 --- a/demos/AT32/RT-AT-START-F415/main.c +++ b/demos/AT32/RT-AT-START-F415/main.c @@ -31,17 +31,11 @@ static THD_FUNCTION(Thread1, arg) { (void)arg; chRegSetThreadName("blinker"); while (true) { - palSetLine(LINE_LED_RED); + palToggleLine(LINE_LED_RED); chThdSleepMilliseconds(250); - palSetLine(LINE_LED_YELLOW); + palToggleLine(LINE_LED_YELLOW); chThdSleepMilliseconds(250); - palSetLine(LINE_LED_GREEN); - chThdSleepMilliseconds(250); - palClearLine(LINE_LED_RED); - chThdSleepMilliseconds(250); - palClearLine(LINE_LED_YELLOW); - chThdSleepMilliseconds(250); - palClearLine(LINE_LED_GREEN); + palToggleLine(LINE_LED_GREEN); chThdSleepMilliseconds(250); } } diff --git a/os/hal/boards/AT_START_F415/board.c b/os/hal/boards/AT_START_F415/board.c index 8ae1f6737e..8d8e33825d 100644 --- a/os/hal/boards/AT_START_F415/board.c +++ b/os/hal/boards/AT_START_F415/board.c @@ -79,7 +79,7 @@ bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { if (blkIsTransferring(sdcp)) return last_status; - return last_status = (bool)palReadPad(GPIOA, GPIOA_ARD_A2); + return last_status = (bool)palReadPad(GPIOC, GPIOC_PIN11); } /** diff --git a/os/hal/boards/AT_START_F415/board.h b/os/hal/boards/AT_START_F415/board.h index 7eecf54707..dc5739838e 100644 --- a/os/hal/boards/AT_START_F415/board.h +++ b/os/hal/boards/AT_START_F415/board.h @@ -183,13 +183,13 @@ * 6 - Open Drain output 2MHz. * 7 - Open Drain output 50MHz. * 8 - Digital input with Pull-Up or Pull-Down resistor depending on ODT. - * 9 - Alternate Push Pull output 10MHz. - * A - Alternate Push Pull output 2MHz. - * B - Alternate Push Pull output 50MHz. + * 9 - Multiplexing Push Pull output 10MHz. + * A - Multiplexing Push Pull output 2MHz. + * B - Multiplexing Push Pull output 50MHz. * C - Reserved. - * D - Alternate Open Drain output 10MHz. - * E - Alternate Open Drain output 2MHz. - * F - Alternate Open Drain output 50MHz. + * D - Multiplexing Open Drain output 10MHz. + * E - Multiplexing Open Drain output 2MHz. + * F - Multiplexing Open Drain output 50MHz. * Please refer to the AT32 Reference Manual for details. */ @@ -197,7 +197,7 @@ * Port A setup. * Everything input with pull-up except: * PA0 - Normal input (GPIOA_BUTTON). - * PA9 - Alternate output (GPIOA_ARD_D8). + * PA9 - Multiplexing output (GPIOA_ARD_D8). * PA10 - Normal input (GPIOA_ARD_D2). */ #define VAL_GPIOACFGLR 0x88888884 /* PA7...PA0 */ @@ -217,10 +217,15 @@ * PC2 - Push Pull output (GPIOC_LED_RED). * PC3 - Push Pull output (GPIOC_LED_YELLOW). * PC5 - Push Pull output (GPIOC_LED_GREEN). + * PC8 - Multiplexing output (GPIOC_PIN8). + * PC9 - Multiplexing output (GPIOC_PIN9). + * PC10 - Multiplexing output (GPIOC_PIN10). + * PC11 - Multiplexing output (GPIOC_PIN11). + * PC12 - Multiplexing output (GPIOC_PIN12). * PC13 - Normal input (GPIOC_BUTTON). */ #define VAL_GPIOCCFGLR 0x88383388 /* PC7...PC0 */ -#define VAL_GPIOCCFGHR 0x88488888 /* PC15...PC8 */ +#define VAL_GPIOCCFGHR 0x884BBBBB /* PC15...PC8 */ #define VAL_GPIOCODT 0xFFFFFFFF /* @@ -228,8 +233,9 @@ * Everything input with pull-up except: * PD0 - Normal input (GPIOD_HEXT_IN). * PD1 - Normal input (GPIOD_HEXT_OUT). + * PD2 - Multiplexing output (GPIOD_PIN2). */ -#define VAL_GPIODCFGLR 0x88888844 /* PD7...PD0 */ +#define VAL_GPIODCFGLR 0x88888B44 /* PD7...PD0 */ #define VAL_GPIODCFGHR 0x88888888 /* PD15...PD8 */ #define VAL_GPIODODT 0xFFFFFFFF diff --git a/os/hal/include/hal_crc.h b/os/hal/include/hal_crc.h index 126977e151..8290e2cd91 100644 --- a/os/hal/include/hal_crc.h +++ b/os/hal/include/hal_crc.h @@ -74,9 +74,7 @@ typedef enum { #if STM32_CRC_USE_CRC1 == TRUE #include "hal_crc_lld.h" -#endif - -#if CRCSW_USE_CRC1 == TRUE +#else #include "crcsw.h" /* Include software LL driver */ #endif diff --git a/os/hal/ports/AT32/AT32F415/at32_crm.h b/os/hal/ports/AT32/AT32F415/at32_crm.h index 60f7ddaeb0..a0c2ecf34d 100644 --- a/os/hal/ports/AT32/AT32F415/at32_crm.h +++ b/os/hal/ports/AT32/AT32F415/at32_crm.h @@ -800,6 +800,36 @@ #define crmResetUART5() crmResetAPB1(CRM_APB1RST_UART5RST) /** @} */ +/** + * @name CRC peripherals specific CRM operations + * @{ + */ +/** + * @brief Enables the CRC peripheral clock. + * @note The @p lp parameter is ignored in this family. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define crmEnableCRC(lp) crmEnableAHB(CRM_AHBEN_CRCEN, lp) + +/** + * @brief Disables the CRC peripheral clock. + * + * @api + */ +#define crmDisableCRC() crmDisableAHB(CRM_AHBEN_CRCEN) + +/** + * @brief Resets the CRC peripheral. + * @note Not supported in this family, does nothing. + * + * @api + */ +#define crmResetCRC() +/** @} */ + /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ diff --git a/os/hal/ports/AT32/AT32F415/at32_isr.h b/os/hal/ports/AT32/AT32F415/at32_isr.h index 277b402f45..bfc4aa7cda 100644 --- a/os/hal/ports/AT32/AT32F415/at32_isr.h +++ b/os/hal/ports/AT32/AT32F415/at32_isr.h @@ -210,6 +210,15 @@ #define AT32_TMR4_NUMBER 30 #define AT32_TMR5_NUMBER 50 +/* Aliases.*/ +#define AT32_TMR9_HANDLER VectorA0 +#define AT32_TMR10_HANDLER VectorA4 +#define AT32_TMR11_HANDLER VectorA8 + +#define AT32_TMR9_NUMBER 24 +#define AT32_TMR10_NUMBER 25 +#define AT32_TMR11_NUMBER 26 + /* * USART units. */ diff --git a/os/hal/ports/AT32/AT32F415/at32_registry.h b/os/hal/ports/AT32/AT32F415/at32_registry.h index 2d717fc3ed..d4636c8536 100644 --- a/os/hal/ports/AT32/AT32F415/at32_registry.h +++ b/os/hal/ports/AT32/AT32F415/at32_registry.h @@ -265,6 +265,16 @@ /* WDT attributes.*/ #define AT32_HAS_WDT TRUE #define AT32_WDT_IS_WINDOWED FALSE + +/* CRC attributes.*/ +#define AT32_HAS_CRC TRUE + +/* STM32 compatibility define. */ +#if AT32_CRC_USE_CRC1 == TRUE +#define STM32_CRC_USE_CRC1 TRUE +#else +#define STM32_CRC_USE_CRC1 FALSE +#endif /** @} */ #endif /* defined(AT32F415K_MD) */ @@ -480,6 +490,16 @@ /* WDT attributes.*/ #define AT32_HAS_WDT TRUE #define AT32_WDT_IS_WINDOWED FALSE + +/* CRC attributes.*/ +#define AT32_HAS_CRC TRUE + +/* STM32 compatibility define. */ +#if AT32_CRC_USE_CRC1 == TRUE +#define STM32_CRC_USE_CRC1 TRUE +#else +#define STM32_CRC_USE_CRC1 FALSE +#endif /** @} */ #endif /* defined(AT32F415K_HD) */ @@ -705,6 +725,16 @@ /* WDT attributes.*/ #define AT32_HAS_WDT TRUE #define AT32_WDT_IS_WINDOWED FALSE + +/* CRC attributes.*/ +#define AT32_HAS_CRC TRUE + +/* STM32 compatibility define. */ +#if AT32_CRC_USE_CRC1 == TRUE +#define STM32_CRC_USE_CRC1 TRUE +#else +#define STM32_CRC_USE_CRC1 FALSE +#endif /** @} */ #endif /* defined(AT32F415C_MD) */ @@ -930,6 +960,16 @@ /* WDT attributes.*/ #define AT32_HAS_WDT TRUE #define AT32_WDT_IS_WINDOWED FALSE + +/* CRC attributes.*/ +#define AT32_HAS_CRC TRUE + +/* STM32 compatibility define. */ +#if AT32_CRC_USE_CRC1 == TRUE +#define STM32_CRC_USE_CRC1 TRUE +#else +#define STM32_CRC_USE_CRC1 FALSE +#endif /** @} */ #endif /* defined(AT32F415C_HD) */ @@ -1174,6 +1214,16 @@ /* WDT attributes.*/ #define AT32_HAS_WDT TRUE #define AT32_WDT_IS_WINDOWED FALSE + +/* CRC attributes.*/ +#define AT32_HAS_CRC TRUE + +/* STM32 compatibility define. */ +#if AT32_CRC_USE_CRC1 == TRUE +#define STM32_CRC_USE_CRC1 TRUE +#else +#define STM32_CRC_USE_CRC1 FALSE +#endif /** @} */ #endif /* defined(AT32F415R_MD) */ @@ -1418,6 +1468,16 @@ /* WDT attributes.*/ #define AT32_HAS_WDT TRUE #define AT32_WDT_IS_WINDOWED FALSE + +/* CRC attributes.*/ +#define AT32_HAS_CRC TRUE + +/* STM32 compatibility define. */ +#if AT32_CRC_USE_CRC1 == TRUE +#define STM32_CRC_USE_CRC1 TRUE +#else +#define STM32_CRC_USE_CRC1 FALSE +#endif /** @} */ #endif /* defined(AT32F415R_HD) */ diff --git a/os/hal/ports/AT32/AT32F415/hal_lld.h b/os/hal/ports/AT32/AT32F415/hal_lld.h index 3b6b7cc15d..6eb43f528e 100644 --- a/os/hal/ports/AT32/AT32F415/hal_lld.h +++ b/os/hal/ports/AT32/AT32F415/hal_lld.h @@ -506,7 +506,7 @@ * @brief ERTC clock source. */ #if !defined(AT32_ERTCSEL) || defined(__DOXYGEN__) -#define AT32_ERTCSEL AT32_ERTCSEL_LICK +#define AT32_ERTCSEL AT32_ERTCSEL_NOCLOCK #endif /** @} */ diff --git a/os/hal/ports/AT32/AT32F415/platform.mk b/os/hal/ports/AT32/AT32F415/platform.mk index 5605bea088..5a8c509048 100644 --- a/os/hal/ports/AT32/AT32F415/platform.mk +++ b/os/hal/ports/AT32/AT32F415/platform.mk @@ -20,11 +20,12 @@ ifeq ($(HALCONFDIR),) endif endif -HALCONF := $(strip $(shell cat $(HALCONFDIR)/halconf.h | egrep -e "\#define")) +HALCONF := $(strip $(shell cat $(HALCONFDIR)/halconf.h $(HALCONFDIR)/halconf_community.h | egrep -e "\#define")) endif # Drivers compatible with the platform. include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/LLD/ADCv1/driver.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/LLD/CRCv1/driver.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/LLD/DMAv1/driver.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/LLD/EXINTv1/driver.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/LLD/GPIOv1/driver.mk diff --git a/os/hal/ports/AT32/LLD/CRCv1/driver.mk b/os/hal/ports/AT32/LLD/CRCv1/driver.mk new file mode 100644 index 0000000000..b9e87cd59a --- /dev/null +++ b/os/hal/ports/AT32/LLD/CRCv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_CRC TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/LLD/CRCv1/hal_crc_lld.c +endif +else +PLATFORMSRC_CONTRIB += $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/LLD/CRCv1/hal_crc_lld.c +endif + +PLATFORMINC_CONTRIB += $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/LLD/CRCv1 diff --git a/os/hal/ports/AT32/LLD/CRCv1/hal_crc_lld.c b/os/hal/ports/AT32/LLD/CRCv1/hal_crc_lld.c new file mode 100644 index 0000000000..09c065cb7a --- /dev/null +++ b/os/hal/ports/AT32/LLD/CRCv1/hal_crc_lld.c @@ -0,0 +1,296 @@ +/* + ChibiOS - Copyright (C) 2015 Michael D. Spradling + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file CRCv1/hal_crc_lld.c + * @brief AT32 CRC subsystem low level driver source. + * + * @addtogroup CRC + * @{ + */ + +#include "hal.h" + +#if (HAL_USE_CRC == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/** + * @brief CRC default configuration. + */ +static const CRCConfig default_config = { + .poly_size = 32, + .poly = 0x04C11DB7, + .initial_val = 0xFFFFFFFF, + .final_val = 0xFFFFFFFF, + .reflect_data = 1, + .reflect_remainder = 1 +}; + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** @brief CRC1 driver identifier.*/ +#if AT32_CRC_USE_CRC1 || defined(__DOXYGEN__) +CRCDriver CRCD1; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +void _crc_lld_calc_byte(CRCDriver *crcp, uint8_t data) { + __IO uint8_t *crc8 = (__IO uint8_t*)&(crcp->crc->DT); + *crc8 = data; +} + +/* + * @brief Returns calculated CRC from last reset + * + * @param[in] crcp pointer to the @p CRCDriver object + * @param[in] data data to be added to crc + * + * @notapi + */ +void _crc_lld_calc_halfword(CRCDriver *crcp, uint16_t data) { + __IO uint16_t *crc16 = (__IO uint16_t*)&(crcp->crc->DT); + *crc16 = data; +} + +/* + * @brief Returns calculated CRC from last reset + * + * @param[in] crcp pointer to the @p CRCDriver object + * @param[in] data data to be added to crc + * + * @notapi + */ +void _crc_lld_calc_word(CRCDriver *crcp, uint32_t data) { + crcp->crc->DT = data; +} + + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/** + * @brief Shared end-of-rx service routine. + * + * @param[in] crcp pointer to the @p CRCDriver object + * @param[in] flags pre-shifted content of the STS register + */ +#if CRC_USE_DMA == TRUE +static void crc_lld_serve_interrupt(CRCDriver *crcp, uint32_t flags) { + + /* DMA errors handling.*/ +#if defined(AT32_CRC_DMA_ERROR_HOOK) + if ((flags & AT32_DMA_STS_DTERRF) != 0) { + AT32_CRC_DMA_ERROR_HOOK(crcp); + } +#else + (void)flags; +#endif + + /* Stop everything.*/ + dmaStreamDisable(crcp->dmastp); + + if (crcp->rem_data_size) { + /* Start DMA follow up transfer for next data chunk */ + crc_lld_start_calc(crcp, crcp->rem_data_size, + (const void *)crcp->dmastp->channel->CPADDR+0xffff); + } else { + /* Portable CRC STS code defined in the high level driver, note, it is a macro.*/ + _crc_isr_code(crcp, crcp->crc->DT ^ crcp->config->final_val); + } +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level CRC driver initialization. + * + * @notapi + */ +void crc_lld_init(void) { + crcObjectInit(&CRCD1); + CRCD1.crc = CRC; +} + +/** + * @brief Configures and activates the CRC peripheral. + * + * @param[in] crcp pointer to the @p CRCDriver object + * + * @notapi + */ +void crc_lld_start(CRCDriver *crcp) { + if (crcp->config == NULL) + crcp->config = &default_config; + + crmEnableCRC(false); + + crcp->crc->IDT = crcp->config->initial_val; + crcp->crc->POLY = crcp->config->poly; + + crcp->crc->CTRL = 0; + switch(crcp->config->poly_size) { + case 32: + break; + case 16: + crcp->crc->CTRL |= CRC_CTRL_POLY_SIZE_0; + break; + case 8: + crcp->crc->CTRL |= CRC_CTRL_POLY_SIZE_1; + break; + case 7: + crcp->crc->CTRL |= CRC_CTRL_POLY_SIZE_1 | CRC_CTRL_POLY_SIZE_0; + break; + default: + osalDbgAssert(false, "hardware doesn't support polynomial size"); + break; + }; + if (crcp->config->reflect_data) { + crcp->crc->CTRL |= CRC_CTRL_REVID_1 | CRC_CTRL_REVID_0; + } + if (crcp->config->reflect_remainder) { + crcp->crc->CTRL |= CRC_CTRL_REVOD; + } + +#if CRC_USE_DMA == TRUE + crcp->dmamode = AT32_DMA_CCTRL_DTD_M2M | AT32_DMA_CCTRL_PINCM | + AT32_DMA_CCTRL_MWIDTH_BYTE | AT32_DMA_CCTRL_PWIDTH_BYTE | + AT32_DMA_CCTRL_DTERRIEN | AT32_DMA_CCTRL_FDTIEN | + AT32_DMA_CCTRL_CHPL(AT32_CRC_CRC1_DMA_PRIORITY); + { + crcp->dmastp = dmaStreamAlloc(AT32_CRC_CRC1_DMA_STREAM, + AT32_CRC_CRC1_IRQ_PRIORITY, + (at32_dmasts_t)crc_lld_serve_interrupt, + (void *)crcp); + osalDbgAssert(crcp->dmastp != NULL, "unable to allocate stream"); + } +#endif +} + + +/** + * @brief Deactivates the CRC peripheral. + * + * @param[in] crcp pointer to the @p CRCDriver object + * + * @notapi + */ +void crc_lld_stop(CRCDriver *crcp) { +#if CRC_USE_DMA == TRUE + dmaStreamFree(crcp->dmastp); +#else + (void)crcp; +#endif + crmDisableCRC(); +} + +/** + * @brief Resets current CRC calculation. + * + * @param[in] crcp pointer to the @p CRCDriver object + * + * @notapi + */ +void crc_lld_reset(CRCDriver *crcp) { + crcp->crc->CTRL |= CRC_CTRL_RST; +} + +/** + * @brief Returns calculated CRC from last reset + * + * @param[in] crcp pointer to the @p CRCDriver object + * @param[in] n size of buf in bytes + * @param[in] buf @p buffer location + * + * @notapi + */ +uint32_t crc_lld_calc(CRCDriver *crcp, size_t n, const void *buf) { +#if CRC_USE_DMA == TRUE + crc_lld_start_calc(crcp, n, buf); + (void) osalThreadSuspendS(&crcp->thread); +#else + if (crcp->config->reflect_data != 0) { + /* set default bit reversal done by word */ + crcp->crc->CTRL |= CRC_CTRL_REVID_1 | CRC_CTRL_REVID_0; + while(n > 3) { + _crc_lld_calc_word(crcp, *(uint32_t*)buf); + buf+=4; + n-=4; + } + } + + /* Programmable CRC units allow variable register width accesses.*/ + if (crcp->config->reflect_data != 0) { + /* use bit reversal done by half-word if we are going to write tailing halfword */ + crcp->crc->CTRL = (crcp->crc->CTRL & ~CRC_CTRL_REVID_Msk) | CRC_CTRL_REVID_1; + while(n > 1) { + _crc_lld_calc_halfword(crcp, *(uint16_t*)buf); + buf+=2; + n-=2; + } + } + + /* use bit reversal done by byte if we are going to write tailing byte */ + if (crcp->config->reflect_data != 0) { + crcp->crc->CTRL = (crcp->crc->CTRL & ~CRC_CTRL_REVID_Msk) | CRC_CTRL_REVID_0; + } + + while(n > 0) { + _crc_lld_calc_byte(crcp, *(uint8_t*)buf); + buf++; + n--; + } + +#endif + return crcp->crc->DT ^ crcp->config->final_val; +} + +#if CRC_USE_DMA == TRUE +void crc_lld_start_calc(CRCDriver *crcp, size_t n, const void *buf) { + /* The AT32 DMA can only handle max 65535 bytes per transfer + * because it's data count register has only 16 bit. */ + size_t sz = (n > 0xffff) ? 0xffff : n; + crcp->rem_data_size = n-sz; + + dmaStreamSetPeripheral(crcp->dmastp, buf); + dmaStreamSetMemory0(crcp->dmastp, &crcp->crc->DT); + dmaStreamSetTransactionSize(crcp->dmastp, sz); + dmaStreamSetMode(crcp->dmastp, crcp->dmamode); + + dmaStreamEnable(crcp->dmastp); +} +#endif + +#endif /* HAL_USE_CRC */ + +/** @} */ diff --git a/os/hal/ports/AT32/LLD/CRCv1/hal_crc_lld.h b/os/hal/ports/AT32/LLD/CRCv1/hal_crc_lld.h new file mode 100644 index 0000000000..f443c0a911 --- /dev/null +++ b/os/hal/ports/AT32/LLD/CRCv1/hal_crc_lld.h @@ -0,0 +1,239 @@ +/* + ChibiOS - Copyright (C) 2015 Michael D. Spradling + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file CRCv1/hal_crc_lld.h + * @brief AT32 CRC subsystem low level driver header. + * + * @addtogroup CRC + * @{ + */ + +#ifndef HAL_CRC_LLD_H_ +#define HAL_CRC_LLD_H_ + +#if (HAL_USE_CRC == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief CRC1 driver enable switch. + * @details If set to @p TRUE the support for CRC1 is included. + * @note The default is @p FALSE. + */ +#if !defined(AT32_CRC_USE_CRC1) || defined(__DOXYGEN__) +#define AT32_CRC_USE_CRC1 FALSE +#endif + +/** + * @brief CRC1 DMA priority (0..3|lowest..highest). + * @note The priority level is for CRC DMA stream. + */ +#if !defined(AT32_CRC_CRC1_DMA_PRIORITY) || defined(__DOXYGEN__) +#define AT32_CRC_CRC1_DMA_PRIORITY 2 +#endif + +/** + * @brief CRC1 DMA interrupt priority level setting. + */ +#if !defined(AT32_CRC_CRC1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define AT32_CRC_CRC1_IRQ_PRIORITY 1 +#endif + +/** + * @brief CRC1 DMA STREAM to use when performing CRC calculation. + */ +#if !defined(AT32_CRC_CRC1_DMA_STREAM) || defined(__DOXYGEN__) +#define AT32_CRC_CRC1_DMA_STREAM AT32_DMA1_STREAM2 +#endif + +/** + * @brief CRC DMA error hook. + */ +#if !defined(AT32_CRC_DMA_ERROR_HOOK) || defined(__DOXYGEN__) +#define AT32_CRC_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if AT32_CRC_USE_CRC1 && !AT32_HAS_CRC +#error "CRC1 not present in the selected device" +#endif + +#if CRC_USE_DMA +#if AT32_CRC_USE_CRC1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(AT32_CRC_CRC1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to CRC1" +#endif + +#if AT32_CRC_USE_CRC1 && \ + !AT32_DMA_IS_VALID_PRIORITY(AT32_CRC_CRC1_DMA_PRIORITY) +#error "Invalid DMA priority assigned to CRC1" +#endif + +#if !defined(AT32_DMA_REQUIRED) +#define AT32_DMA_REQUIRED +#endif +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of a structure representing an CRC driver. + */ +typedef struct CRCDriver CRCDriver; + +/** + * @brief CRC notification callback type + * + * @param[in] crcp pointer to the @ CRCDriver object triggering the + * callback + */ +typedef void (*crccallback_t)(CRCDriver *crcp, uint32_t crc); + +/** + * @brief Driver configuration structure. + */ +typedef struct { + /** + * @brief The size of polynomial to be used for CRC. + */ + uint32_t poly_size; + /** + * @brief The coefficients of the polynomial to be used for CRC. + */ + uint32_t poly; + /** + * @brief The inital value + */ + uint32_t initial_val; + /** + * @brief The final XOR value + */ + uint32_t final_val; + /** + * @brief Reflect bit order data going into CRC + */ + bool reflect_data; + /** + * @brief Reflect bit order of final remainder + */ + bool reflect_remainder; + /* End of the mandatory fields.*/ + /** + * @brief Operation complete callback or @p NULL + */ + crccallback_t end_cb; +} CRCConfig; + + +/** + * @brief Structure representing an CRC driver. + */ +struct CRCDriver { + /** + * @brief Driver state. + */ + crcstate_t state; + /** + * @brief Current configuration data. + */ + const CRCConfig *config; +#if CRC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) + /** + * @brief Mutex protecting the peripheral. + */ + mutex_t mutex; +#endif /* CRC_USE_MUTUAL_EXCLUSION */ +#if defined(CRC_DRIVER_EXT_FIELDS) + CRC_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the CRCx registers block. + */ + CRC_TypeDef *crc; + +#if CRC_USE_DMA == TRUE + /** + * @brief Waiting thread. + */ + thread_reference_t thread; + /** + * @brief Remaining data size. + * @note The DMA can handle only 65535 bytes per transfer because + * it's data count register is only 16 bits wide. + */ + size_t rem_data_size; + /** + * @brief CRC DMA stream + */ + const at32_dma_stream_t *dmastp; + /** + * @brief DMA mode bit mask. + */ + uint32_t dmamode; +#endif +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if AT32_CRC_USE_CRC1 && !defined(__DOXYGEN__) +extern CRCDriver CRCD1; +#endif /* AT32_CRC_USE_CRC1 */ + +#ifdef __cplusplus +extern "C" { +#endif + void crc_lld_init(void); + void crc_lld_start(CRCDriver *crcp); + void crc_lld_stop(CRCDriver *crcp); + void crc_lld_reset(CRCDriver *crcp); + uint32_t crc_lld_calc(CRCDriver *crcp, size_t n, const void *buf); +#if CRC_USE_DMA + void crc_lld_start_calc(CRCDriver *crcp, size_t n, const void *buf); +#endif +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_CRC */ + +#endif /* HAL_CRC_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/AT32/LLD/GPIOv1/hal_pal_lld.c b/os/hal/ports/AT32/LLD/GPIOv1/hal_pal_lld.c index ee967c7cff..6a70cb35f4 100644 --- a/os/hal/ports/AT32/LLD/GPIOv1/hal_pal_lld.c +++ b/os/hal/ports/AT32/LLD/GPIOv1/hal_pal_lld.c @@ -154,8 +154,8 @@ void _pal_lld_setgroupmode(ioportid_t port, 8, /* Reserved.*/ 8, /* Reserved.*/ 8, /* Reserved.*/ - 0xB, /* PAL_MODE_AT32_ALTERNATE_PUSHPULL, 50MHz.*/ - 0xF, /* PAL_MODE_AT32_ALTERNATE_OPENDRAIN, 50MHz.*/ + 0xB, /* PAL_MODE_AT32_MUX_PUSHPULL, 50MHz.*/ + 0xF, /* PAL_MODE_AT32_MUX_OPENDRAIN, 50MHz.*/ }; uint32_t mh, ml, cfghr, cfglr, cfg; unsigned i; diff --git a/os/hal/ports/AT32/LLD/GPIOv1/hal_pal_lld.h b/os/hal/ports/AT32/LLD/GPIOv1/hal_pal_lld.h index 8cc3136781..5b4965c0cd 100644 --- a/os/hal/ports/AT32/LLD/GPIOv1/hal_pal_lld.h +++ b/os/hal/ports/AT32/LLD/GPIOv1/hal_pal_lld.h @@ -38,14 +38,14 @@ * @{ */ /** - * @brief AT32 specific alternate push-pull output mode. + * @brief AT32 specific multiplexing push-pull output mode. */ -#define PAL_MODE_AT32_ALTERNATE_PUSHPULL 16 +#define PAL_MODE_AT32_MUX_PUSHPULL 16 /** - * @brief AT32 specific alternate open-drain output mode. + * @brief AT32 specific multiplexing open-drain output mode. */ -#define PAL_MODE_AT32_ALTERNATE_OPENDRAIN 17 +#define PAL_MODE_AT32_MUX_OPENDRAIN 17 /** @} */ /*===========================================================================*/ diff --git a/os/hal/ports/AT32/LLD/I2Cv1/driver.mk b/os/hal/ports/AT32/LLD/I2Cv1/driver.mk index e2adad39d7..1a0b930c1c 100644 --- a/os/hal/ports/AT32/LLD/I2Cv1/driver.mk +++ b/os/hal/ports/AT32/LLD/I2Cv1/driver.mk @@ -2,12 +2,12 @@ ifeq ($(USE_HAL_I2C_FALLBACK),yes) # Fallback SW driver. ifeq ($(USE_SMART_BUILD),yes) ifneq ($(findstring HAL_USE_I2C TRUE,$(HALCONF)),) - PLATFORMSRC_CONTRIB += $(CHIBIOS)/os/hal/lib/fallback/I2C/hal_i2c_lld.c + PLATFORMSRC_CONTRIB += $(CHIBIOS_CONTRIB)/os/hal/lib/fallback/I2C/hal_i2c_lld.c endif else - PLATFORMSRC_CONTRIB += $(CHIBIOS)/os/hal/lib/fallback/I2C/hal_i2c_lld.c + PLATFORMSRC_CONTRIB += $(CHIBIOS_CONTRIB)/os/hal/lib/fallback/I2C/hal_i2c_lld.c endif - PLATFORMINC_CONTRIB += $(CHIBIOS)/os/hal/lib/fallback/I2C + PLATFORMINC_CONTRIB += $(CHIBIOS_CONTRIB)/os/hal/lib/fallback/I2C else ifeq ($(USE_SMART_BUILD),yes) ifneq ($(findstring HAL_USE_I2C TRUE,$(HALCONF)),) diff --git a/os/hal/ports/AT32/LLD/OTGv1/hal_usb_lld.c b/os/hal/ports/AT32/LLD/OTGv1/hal_usb_lld.c index 4486b8f946..856ba95e87 100644 --- a/os/hal/ports/AT32/LLD/OTGv1/hal_usb_lld.c +++ b/os/hal/ports/AT32/LLD/OTGv1/hal_usb_lld.c @@ -58,6 +58,8 @@ #endif +#define IRQ_RETRY_MASK (GINTSTS_NPTXFEMP | GINTSTS_PTXFEMP | GINTSTS_RXFLVL) + /*===========================================================================*/ /* Driver exported variables. */ /*===========================================================================*/ @@ -173,6 +175,20 @@ static void otg_disable_ep(USBDriver *usbp) { otgp->DAINTMSK = DAINTMSK_OUTEPTMSK(0) | DAINTMSK_INEPTMSK(0); } +static void otg_enable_ep(USBDriver *usbp) { + at32_otg_t *otgp = usbp->otg; + unsigned i; + + for (i = 0; i <= usbp->otgparams->num_endpoints; i++) { + if (usbp->epc[i]->out_state != NULL) { + otgp->DAINTMSK |= DAINTMSK_OUTEPTMSK(i); + } + if (usbp->epc[i]->in_state != NULL) { + otgp->DAINTMSK |= DAINTMSK_INEPTMSK(i); + } + } +} + static void otg_rxfifo_flush(USBDriver *usbp) { at32_otg_t *otgp = usbp->otg; @@ -285,30 +301,36 @@ static void otg_fifo_read_to_buffer(volatile uint32_t *fifop, * @notapi */ static void otg_rxfifo_handler(USBDriver *usbp) { - uint32_t sts, cnt, ep; + uint32_t sts, ep; + size_t n, max; /* Popping the event word out of the RX FIFO.*/ sts = usbp->otg->GRXSTSP; /* Event details.*/ - cnt = (sts & GRXSTSP_BCNT_MASK) >> GRXSTSP_BCNT_OFF; - ep = (sts & GRXSTSP_EPTNUM_MASK) >> GRXSTSP_EPTNUM_OFF; + n = (size_t)((sts & GRXSTSP_BCNT_MASK) >> GRXSTSP_BCNT_OFF); + ep = (sts & GRXSTSP_EPTNUM_MASK) >> GRXSTSP_EPTNUM_OFF; switch (sts & GRXSTSP_PKTSTS_MASK) { case GRXSTSP_SETUP_DATA: otg_fifo_read_to_buffer(usbp->otg->FIFO[0], usbp->epc[ep]->setup_buf, - cnt, 8); + n, 8); break; case GRXSTSP_SETUP_COMP: break; case GRXSTSP_OUT_DATA: + max = usbp->epc[ep]->out_state->rxsize - usbp->epc[ep]->out_state->rxcnt; otg_fifo_read_to_buffer(usbp->otg->FIFO[0], usbp->epc[ep]->out_state->rxbuf, - cnt, - usbp->epc[ep]->out_state->rxsize - - usbp->epc[ep]->out_state->rxcnt); - usbp->epc[ep]->out_state->rxbuf += cnt; - usbp->epc[ep]->out_state->rxcnt += cnt; + n, max); + if (n < max) { + usbp->epc[ep]->out_state->rxbuf += n; + usbp->epc[ep]->out_state->rxcnt += n; + } + else { + usbp->epc[ep]->out_state->rxbuf += max; + usbp->epc[ep]->out_state->rxcnt += max; + } break; case GRXSTSP_OUT_COMP: break; @@ -533,6 +555,9 @@ static void otg_isoc_out_failed_handler(USBDriver *usbp) { static void usb_lld_serve_interrupt(USBDriver *usbp) { at32_otg_t *otgp = usbp->otg; uint32_t sts, src; + unsigned retry = 64U; + +irq_retry: sts = otgp->GINTSTS; sts &= otgp->GINTMSK; @@ -556,6 +581,9 @@ static void usb_lld_serve_interrupt(USBDriver *usbp) { otgp->PCGCCTL &= ~PCGCCTL_STOPPCLK; } + /* Re-enable endpoint IRQs if they have been disabled by suspend before.*/ + otg_enable_ep(usbp); + /* Clear the Remote Wake-up Signaling.*/ otgp->DCTL &= ~DCTL_RWKUPSIG; @@ -598,6 +626,10 @@ static void usb_lld_serve_interrupt(USBDriver *usbp) { /* Set to zero to un-gate the USB core clocks.*/ otgp->PCGCCTL &= ~PCGCCTL_STOPPCLK; } + + /* Re-enable endpoint irqs if they have been disabled by suspend before. */ + otg_enable_ep(usbp); + _usb_wakeup(usbp); } @@ -614,12 +646,6 @@ static void usb_lld_serve_interrupt(USBDriver *usbp) { otg_isoc_out_failed_handler(usbp); } - /* Performing the whole FIFO emptying in the ISR, it is advised to keep - this IRQ at a very low priority level.*/ - if ((sts & GINTSTS_RXFLVL) != 0U) { - otg_rxfifo_handler(usbp); - } - /* IN/OUT endpoints event handling.*/ src = otgp->DAINT; if (sts & GINTSTS_OEPTINT) { @@ -682,6 +708,15 @@ static void usb_lld_serve_interrupt(USBDriver *usbp) { otg_epin_handler(usbp, 8); #endif } + + /* Performing the whole FIFO emptying in the STS, it is advised to keep + this IRQ at a very low priority level.*/ + if ((sts & GINTSTS_RXFLVL) != 0U) { + otg_rxfifo_handler(usbp); + } + + if ((sts & IRQ_RETRY_MASK) && (--retry > 0U)) + goto irq_retry; } /*===========================================================================*/ @@ -1129,7 +1164,7 @@ void usb_lld_start_out(USBDriver *usbp, usbep_t ep) { /* Transfer initialization.*/ osp->totsize = osp->rxsize; if ((ep == 0) && (osp->rxsize > EP0_MAX_OUTSIZE)) - osp->rxsize = EP0_MAX_OUTSIZE; + osp->rxsize = EP0_MAX_OUTSIZE; /* Transaction size is rounded to a multiple of packet size because the following requirement in the RM: diff --git a/os/hal/ports/AT32/LLD/OTGv1/hal_usb_lld.h b/os/hal/ports/AT32/LLD/OTGv1/hal_usb_lld.h index f8c9fc8fee..67d6dd1f76 100644 --- a/os/hal/ports/AT32/LLD/OTGv1/hal_usb_lld.h +++ b/os/hal/ports/AT32/LLD/OTGv1/hal_usb_lld.h @@ -539,6 +539,9 @@ struct USBDriver { */ #define usb_lld_wakeup_host(usbp) \ do { \ + /* Turnings clocks back on (may be required if coming out of suspend + mode).*/ \ + (usbp)->otg->PCGCCTL &= ~PCGCCTL_STOPPCLK; \ (usbp)->otg->DCTL |= DCTL_RWKUPSIG; \ /* remote wakeup doesn't trigger the wakeup interrupt, therefore we use the SOF interrupt to detect resume of the bus.*/ \ diff --git a/os/hal/ports/AT32/LLD/SDIOv1/hal_sdc_lld.c b/os/hal/ports/AT32/LLD/SDIOv1/hal_sdc_lld.c index bb8e1e96b6..9cbea0e255 100644 --- a/os/hal/ports/AT32/LLD/SDIOv1/hal_sdc_lld.c +++ b/os/hal/ports/AT32/LLD/SDIOv1/hal_sdc_lld.c @@ -104,7 +104,7 @@ static uint32_t sdc_lld_clkdiv(SDCDriver *sdcp, uint32_t f) { return SDIO_CLKCTRL_BYPSEN; } - return div - 2U; + return div - 2U; } /** diff --git a/testhal/AT32/multi/ERTC/.cproject b/testhal/AT32/multi/ERTC/.cproject index 74701160a0..6dc80f3268 100644 --- a/testhal/AT32/multi/ERTC/.cproject +++ b/testhal/AT32/multi/ERTC/.cproject @@ -37,7 +37,7 @@ - + @@ -48,7 +48,7 @@ - + diff --git a/testhal/AT32/multi/ERTC/cfg/at-start-f415/config.h b/testhal/AT32/multi/ERTC/cfg/at-start-f415/config.h index 4fbd7cc3df..361e185d9c 100644 --- a/testhal/AT32/multi/ERTC/cfg/at-start-f415/config.h +++ b/testhal/AT32/multi/ERTC/cfg/at-start-f415/config.h @@ -1,5 +1,4 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio ChibiOS - Copyright (C) 2023..2024 HorrorTroll ChibiOS - Copyright (C) 2023..2024 Zhaqian @@ -16,6 +15,16 @@ limitations under the License. */ +/* + * CRC driver system settings. + */ +#define AT32_CRC_USE_CRC1 FALSE + +#define CRC_USE_DMA FALSE +#define AT32_CRC_CRC1_DMA_PRIORITY 2 +#define AT32_CRC_CRC1_IRQ_PRIORITY 5 +#define AT32_CRC_CRC1_DMA_STREAM AT32_DMA1_STREAM2 + /* * I2C fallback driver system settings. */ diff --git a/testhal/AT32/multi/ERTC/cfg/at-start-f415/halconf.h b/testhal/AT32/multi/ERTC/cfg/at-start-f415/halconf.h index ec123afa7b..9f0399ec2a 100644 --- a/testhal/AT32/multi/ERTC/cfg/at-start-f415/halconf.h +++ b/testhal/AT32/multi/ERTC/cfg/at-start-f415/halconf.h @@ -550,6 +550,8 @@ #define WSPI_USE_MUTUAL_EXCLUSION TRUE #endif +#include "halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/testhal/AT32/multi/ERTC/cfg/at-start-f415/halconf_community.h b/testhal/AT32/multi/ERTC/cfg/at-start-f415/halconf_community.h new file mode 100644 index 0000000000..c43d668764 --- /dev/null +++ b/testhal/AT32/multi/ERTC/cfg/at-start-f415/halconf_community.h @@ -0,0 +1,182 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the COMP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the OPAMP subsystem. + */ +#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__) +#define HAL_USE_OPAMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/AT32/multi/ERTC/cfg/at-start-f415/mcuconf.h b/testhal/AT32/multi/ERTC/cfg/at-start-f415/mcuconf.h index 940b0f6580..14bfc3cf4a 100644 --- a/testhal/AT32/multi/ERTC/cfg/at-start-f415/mcuconf.h +++ b/testhal/AT32/multi/ERTC/cfg/at-start-f415/mcuconf.h @@ -136,10 +136,10 @@ #define AT32_I2C_USE_I2C1 FALSE #define AT32_I2C_USE_I2C2 FALSE #define AT32_I2C_BUSY_TIMEOUT 50 -#define AT32_I2C_I2C1_IRQ_PRIORITY 5 -#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_I2C1_DMA_PRIORITY 3 #define AT32_I2C_I2C2_DMA_PRIORITY 3 +#define AT32_I2C_I2C1_IRQ_PRIORITY 5 +#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* @@ -216,9 +216,13 @@ #define AT32_UART_USE_USART1 FALSE #define AT32_UART_USE_USART2 FALSE #define AT32_UART_USE_USART3 FALSE +#define AT32_UART_USE_UART4 FALSE +#define AT32_UART_USE_UART5 FALSE #define AT32_UART_USART1_DMA_PRIORITY 0 #define AT32_UART_USART2_DMA_PRIORITY 0 #define AT32_UART_USART3_DMA_PRIORITY 0 +#define AT32_UART_UART4_DMA_PRIORITY 0 +#define AT32_UART_UART5_DMA_PRIORITY 0 #define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* diff --git a/testhal/AT32/multi/ERTC/make/at-start-f415.make b/testhal/AT32/multi/ERTC/make/at-start-f415.make index 8e280f39d9..a95d65d0d4 100644 --- a/testhal/AT32/multi/ERTC/make/at-start-f415.make +++ b/testhal/AT32/multi/ERTC/make/at-start-f415.make @@ -105,7 +105,7 @@ include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_at32f415.mk # HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/AT32F415/platform.mk include $(CHIBIOS_CONTRIB)/os/hal/boards/AT_START_F415/board.mk include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk diff --git a/testhal/AT32/multi/I2C_HW/.cproject b/testhal/AT32/multi/I2C_HW/.cproject index 74701160a0..030a79e9ea 100644 --- a/testhal/AT32/multi/I2C_HW/.cproject +++ b/testhal/AT32/multi/I2C_HW/.cproject @@ -37,7 +37,7 @@ - + @@ -48,7 +48,7 @@ - + diff --git a/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/config.h b/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/config.h index 4fbd7cc3df..361e185d9c 100644 --- a/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/config.h +++ b/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/config.h @@ -1,5 +1,4 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio ChibiOS - Copyright (C) 2023..2024 HorrorTroll ChibiOS - Copyright (C) 2023..2024 Zhaqian @@ -16,6 +15,16 @@ limitations under the License. */ +/* + * CRC driver system settings. + */ +#define AT32_CRC_USE_CRC1 FALSE + +#define CRC_USE_DMA FALSE +#define AT32_CRC_CRC1_DMA_PRIORITY 2 +#define AT32_CRC_CRC1_IRQ_PRIORITY 5 +#define AT32_CRC_CRC1_DMA_STREAM AT32_DMA1_STREAM2 + /* * I2C fallback driver system settings. */ diff --git a/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/halconf.h b/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/halconf.h index 28336f6196..7aff43b894 100644 --- a/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/halconf.h +++ b/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/halconf.h @@ -550,6 +550,8 @@ #define WSPI_USE_MUTUAL_EXCLUSION TRUE #endif +#include "halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/halconf_community.h b/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/halconf_community.h new file mode 100644 index 0000000000..c43d668764 --- /dev/null +++ b/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/halconf_community.h @@ -0,0 +1,182 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the COMP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the OPAMP subsystem. + */ +#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__) +#define HAL_USE_OPAMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/mcuconf.h b/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/mcuconf.h index 43da949f1a..37a76b9009 100644 --- a/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/mcuconf.h +++ b/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/mcuconf.h @@ -63,7 +63,7 @@ #define AT32_USBDIV AT32_USBDIV_DIV3 #define AT32_CLKOUT_SEL AT32_CLKOUT_SEL_NOCLOCK #define AT32_CLKOUTDIV AT32_CLKOUTDIV_DIV1 -#define AT32_ERTCSEL AT32_ERTCSEL_HEXTDIV +#define AT32_ERTCSEL AT32_ERTCSEL_NOCLOCK #define AT32_PVM_ENABLE FALSE #define AT32_PVMSEL AT32_PVMSEL_LEV1 @@ -136,10 +136,10 @@ #define AT32_I2C_USE_I2C1 TRUE #define AT32_I2C_USE_I2C2 FALSE #define AT32_I2C_BUSY_TIMEOUT 50 -#define AT32_I2C_I2C1_IRQ_PRIORITY 5 -#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_I2C1_DMA_PRIORITY 3 #define AT32_I2C_I2C2_DMA_PRIORITY 3 +#define AT32_I2C_I2C1_IRQ_PRIORITY 5 +#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* @@ -216,9 +216,13 @@ #define AT32_UART_USE_USART1 FALSE #define AT32_UART_USE_USART2 FALSE #define AT32_UART_USE_USART3 FALSE +#define AT32_UART_USE_UART4 FALSE +#define AT32_UART_USE_UART5 FALSE #define AT32_UART_USART1_DMA_PRIORITY 0 #define AT32_UART_USART2_DMA_PRIORITY 0 #define AT32_UART_USART3_DMA_PRIORITY 0 +#define AT32_UART_UART4_DMA_PRIORITY 0 +#define AT32_UART_UART5_DMA_PRIORITY 0 #define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* diff --git a/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/portab.c b/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/portab.c index ce6fb62e34..d175de5b7a 100644 --- a/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/portab.c +++ b/testhal/AT32/multi/I2C_HW/cfg/at-start-f415/portab.c @@ -62,8 +62,8 @@ I2CConfig i2ccfg = { /*===========================================================================*/ void portab_setup(void) { - palSetLineMode(PAL_LINE(GPIOB, 6U), PAL_MODE_AT32_ALTERNATE_OPENDRAIN); - palSetLineMode(PAL_LINE(GPIOB, 7U), PAL_MODE_AT32_ALTERNATE_OPENDRAIN); + palSetLineMode(PAL_LINE(GPIOB, 6U), PAL_MODE_AT32_MUX_OPENDRAIN); + palSetLineMode(PAL_LINE(GPIOB, 7U), PAL_MODE_AT32_MUX_OPENDRAIN); } /** @} */ diff --git a/testhal/AT32/multi/I2C_HW/main.c b/testhal/AT32/multi/I2C_HW/main.c index 9d3047a9c1..365894bed0 100644 --- a/testhal/AT32/multi/I2C_HW/main.c +++ b/testhal/AT32/multi/I2C_HW/main.c @@ -31,9 +31,7 @@ static THD_FUNCTION(Thread1, arg) { (void)arg; chRegSetThreadName("blinker"); while (true) { - palSetLine(PORTAB_BLINK_LED3); - chThdSleepMilliseconds(500); - palClearLine(PORTAB_BLINK_LED3); + palToggleLine(PORTAB_BLINK_LED3); chThdSleepMilliseconds(500); } } @@ -66,7 +64,7 @@ int main(void) { /* * Starting the blinker thread. */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO-1, Thread1, NULL); /* * Normal main() thread activity, in this demo it does nothing. @@ -91,4 +89,6 @@ int main(void) { chThdSleepMilliseconds(500); palToggleLine(PORTAB_BLINK_LED2); } + + return 0; } diff --git a/testhal/AT32/multi/I2C_HW/make/at-start-f415.make b/testhal/AT32/multi/I2C_HW/make/at-start-f415.make index c52af3650d..ae14ade555 100644 --- a/testhal/AT32/multi/I2C_HW/make/at-start-f415.make +++ b/testhal/AT32/multi/I2C_HW/make/at-start-f415.make @@ -105,7 +105,7 @@ include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_at32f415.mk # HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/AT32F415/platform.mk include $(CHIBIOS_CONTRIB)/os/hal/boards/AT_START_F415/board.mk include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk diff --git a/testhal/AT32/multi/I2C_SW/.cproject b/testhal/AT32/multi/I2C_SW/.cproject index 74701160a0..211f7069dc 100644 --- a/testhal/AT32/multi/I2C_SW/.cproject +++ b/testhal/AT32/multi/I2C_SW/.cproject @@ -37,7 +37,7 @@ - + @@ -48,7 +48,7 @@ - + diff --git a/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/config.h b/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/config.h index 5406a5a50d..b9f1c17460 100644 --- a/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/config.h +++ b/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/config.h @@ -1,5 +1,4 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio ChibiOS - Copyright (C) 2023..2024 HorrorTroll ChibiOS - Copyright (C) 2023..2024 Zhaqian @@ -16,6 +15,16 @@ limitations under the License. */ +/* + * CRC driver system settings. + */ +#define AT32_CRC_USE_CRC1 FALSE + +#define CRC_USE_DMA FALSE +#define AT32_CRC_CRC1_DMA_PRIORITY 2 +#define AT32_CRC_CRC1_IRQ_PRIORITY 5 +#define AT32_CRC_CRC1_DMA_STREAM AT32_DMA1_STREAM2 + /* * I2C fallback driver system settings. */ diff --git a/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/halconf.h b/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/halconf.h index 28336f6196..7aff43b894 100644 --- a/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/halconf.h +++ b/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/halconf.h @@ -550,6 +550,8 @@ #define WSPI_USE_MUTUAL_EXCLUSION TRUE #endif +#include "halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/halconf_community.h b/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/halconf_community.h new file mode 100644 index 0000000000..c43d668764 --- /dev/null +++ b/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/halconf_community.h @@ -0,0 +1,182 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the COMP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the OPAMP subsystem. + */ +#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__) +#define HAL_USE_OPAMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/mcuconf.h b/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/mcuconf.h index f7b4fbfe68..752386482a 100644 --- a/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/mcuconf.h +++ b/testhal/AT32/multi/I2C_SW/cfg/at-start-f415/mcuconf.h @@ -63,7 +63,7 @@ #define AT32_USBDIV AT32_USBDIV_DIV3 #define AT32_CLKOUT_SEL AT32_CLKOUT_SEL_NOCLOCK #define AT32_CLKOUTDIV AT32_CLKOUTDIV_DIV1 -#define AT32_ERTCSEL AT32_ERTCSEL_HEXTDIV +#define AT32_ERTCSEL AT32_ERTCSEL_NOCLOCK #define AT32_PVM_ENABLE FALSE #define AT32_PVMSEL AT32_PVMSEL_LEV1 @@ -136,10 +136,10 @@ #define AT32_I2C_USE_I2C1 FALSE #define AT32_I2C_USE_I2C2 FALSE #define AT32_I2C_BUSY_TIMEOUT 50 -#define AT32_I2C_I2C1_IRQ_PRIORITY 5 -#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_I2C1_DMA_PRIORITY 3 #define AT32_I2C_I2C2_DMA_PRIORITY 3 +#define AT32_I2C_I2C1_IRQ_PRIORITY 5 +#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* @@ -216,9 +216,13 @@ #define AT32_UART_USE_USART1 FALSE #define AT32_UART_USE_USART2 FALSE #define AT32_UART_USE_USART3 FALSE +#define AT32_UART_USE_UART4 FALSE +#define AT32_UART_USE_UART5 FALSE #define AT32_UART_USART1_DMA_PRIORITY 0 #define AT32_UART_USART2_DMA_PRIORITY 0 #define AT32_UART_USART3_DMA_PRIORITY 0 +#define AT32_UART_UART4_DMA_PRIORITY 0 +#define AT32_UART_UART5_DMA_PRIORITY 0 #define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* diff --git a/testhal/AT32/multi/I2C_SW/main.c b/testhal/AT32/multi/I2C_SW/main.c index 9d3047a9c1..365894bed0 100644 --- a/testhal/AT32/multi/I2C_SW/main.c +++ b/testhal/AT32/multi/I2C_SW/main.c @@ -31,9 +31,7 @@ static THD_FUNCTION(Thread1, arg) { (void)arg; chRegSetThreadName("blinker"); while (true) { - palSetLine(PORTAB_BLINK_LED3); - chThdSleepMilliseconds(500); - palClearLine(PORTAB_BLINK_LED3); + palToggleLine(PORTAB_BLINK_LED3); chThdSleepMilliseconds(500); } } @@ -66,7 +64,7 @@ int main(void) { /* * Starting the blinker thread. */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO-1, Thread1, NULL); /* * Normal main() thread activity, in this demo it does nothing. @@ -91,4 +89,6 @@ int main(void) { chThdSleepMilliseconds(500); palToggleLine(PORTAB_BLINK_LED2); } + + return 0; } diff --git a/testhal/AT32/multi/I2C_SW/make/at-start-f415.make b/testhal/AT32/multi/I2C_SW/make/at-start-f415.make index c2a77a92d6..d3b7565d87 100644 --- a/testhal/AT32/multi/I2C_SW/make/at-start-f415.make +++ b/testhal/AT32/multi/I2C_SW/make/at-start-f415.make @@ -105,7 +105,7 @@ include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_at32f415.mk # HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/AT32F415/platform.mk include $(CHIBIOS_CONTRIB)/os/hal/boards/AT_START_F415/board.mk include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk diff --git a/testhal/AT32/multi/PWM_ICU/.cproject b/testhal/AT32/multi/PWM_ICU/.cproject index 74701160a0..8eebfa94ac 100644 --- a/testhal/AT32/multi/PWM_ICU/.cproject +++ b/testhal/AT32/multi/PWM_ICU/.cproject @@ -37,7 +37,7 @@ - + @@ -48,7 +48,7 @@ - + diff --git a/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/config.h b/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/config.h index 4fbd7cc3df..361e185d9c 100644 --- a/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/config.h +++ b/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/config.h @@ -1,5 +1,4 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio ChibiOS - Copyright (C) 2023..2024 HorrorTroll ChibiOS - Copyright (C) 2023..2024 Zhaqian @@ -16,6 +15,16 @@ limitations under the License. */ +/* + * CRC driver system settings. + */ +#define AT32_CRC_USE_CRC1 FALSE + +#define CRC_USE_DMA FALSE +#define AT32_CRC_CRC1_DMA_PRIORITY 2 +#define AT32_CRC_CRC1_IRQ_PRIORITY 5 +#define AT32_CRC_CRC1_DMA_STREAM AT32_DMA1_STREAM2 + /* * I2C fallback driver system settings. */ diff --git a/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/halconf.h b/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/halconf.h index 099dca49da..0581c87686 100644 --- a/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/halconf.h +++ b/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/halconf.h @@ -550,6 +550,8 @@ #define WSPI_USE_MUTUAL_EXCLUSION TRUE #endif +#include "halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/halconf_community.h b/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/halconf_community.h new file mode 100644 index 0000000000..c43d668764 --- /dev/null +++ b/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/halconf_community.h @@ -0,0 +1,182 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the COMP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the OPAMP subsystem. + */ +#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__) +#define HAL_USE_OPAMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/mcuconf.h b/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/mcuconf.h index ae61f32b63..0644aa54ac 100644 --- a/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/mcuconf.h +++ b/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/mcuconf.h @@ -63,7 +63,7 @@ #define AT32_USBDIV AT32_USBDIV_DIV3 #define AT32_CLKOUT_SEL AT32_CLKOUT_SEL_NOCLOCK #define AT32_CLKOUTDIV AT32_CLKOUTDIV_DIV1 -#define AT32_ERTCSEL AT32_ERTCSEL_HEXTDIV +#define AT32_ERTCSEL AT32_ERTCSEL_NOCLOCK #define AT32_PVM_ENABLE FALSE #define AT32_PVMSEL AT32_PVMSEL_LEV1 @@ -136,10 +136,10 @@ #define AT32_I2C_USE_I2C1 FALSE #define AT32_I2C_USE_I2C2 FALSE #define AT32_I2C_BUSY_TIMEOUT 50 -#define AT32_I2C_I2C1_IRQ_PRIORITY 5 -#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_I2C1_DMA_PRIORITY 3 #define AT32_I2C_I2C2_DMA_PRIORITY 3 +#define AT32_I2C_I2C1_IRQ_PRIORITY 5 +#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* @@ -216,9 +216,13 @@ #define AT32_UART_USE_USART1 FALSE #define AT32_UART_USE_USART2 FALSE #define AT32_UART_USE_USART3 FALSE +#define AT32_UART_USE_UART4 FALSE +#define AT32_UART_USE_UART5 FALSE #define AT32_UART_USART1_DMA_PRIORITY 0 #define AT32_UART_USART2_DMA_PRIORITY 0 #define AT32_UART_USART3_DMA_PRIORITY 0 +#define AT32_UART_UART4_DMA_PRIORITY 0 +#define AT32_UART_UART5_DMA_PRIORITY 0 #define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* diff --git a/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/portab.c b/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/portab.c index f1a4b153f0..c3e5018c6d 100644 --- a/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/portab.c +++ b/testhal/AT32/multi/PWM_ICU/cfg/at-start-f415/portab.c @@ -92,7 +92,7 @@ ICUConfig icucfg = { /*===========================================================================*/ void portab_setup(void) { - + palSetLineMode(LINE_ARD_D7, PAL_MODE_AT32_MUX_PUSHPULL); } /** @} */ diff --git a/testhal/AT32/multi/PWM_ICU/main.c b/testhal/AT32/multi/PWM_ICU/main.c index a85b9e6d00..5efc6d1a1e 100644 --- a/testhal/AT32/multi/PWM_ICU/main.c +++ b/testhal/AT32/multi/PWM_ICU/main.c @@ -76,18 +76,17 @@ int main(void) { halInit(); chSysInit(); - /* - * Board-dependent setup code. - */ - portab_setup(); - /* * Starting PWM driver 1 and enabling the notifications. * GPIOA8 is programmed as PWM output (channel 1 of TMR1). */ pwmStart(&PORTAB_PWM1, &pwmcfg); pwmEnablePeriodicNotification(&PORTAB_PWM1); - palSetLineMode(LINE_ARD_D7, PAL_MODE_AT32_ALTERNATE_PUSHPULL); + + /* + * Board-dependent setup code. + */ + portab_setup(); /* * Starting ICU driver 3. @@ -97,14 +96,11 @@ int main(void) { palSetLine(LINE_ARD_D12); /* - * GPIOC2/C3/C5 is programmed as output (board LED). + * Board LED is programmed as output. */ - palClearLine(PORTAB_BLINK_LED1); - palClearLine(PORTAB_BLINK_LED2); - palClearLine(PORTAB_BLINK_LED3); - palSetLine(PORTAB_BLINK_LED1); - palSetLine(PORTAB_BLINK_LED2); - palSetLine(PORTAB_BLINK_LED3); + palToggleLine(PORTAB_BLINK_LED1); + palToggleLine(PORTAB_BLINK_LED2); + palToggleLine(PORTAB_BLINK_LED3); chThdSleepMilliseconds(1000); /* diff --git a/testhal/AT32/multi/PWM_ICU/make/at-start-f415.make b/testhal/AT32/multi/PWM_ICU/make/at-start-f415.make index c52af3650d..ae14ade555 100644 --- a/testhal/AT32/multi/PWM_ICU/make/at-start-f415.make +++ b/testhal/AT32/multi/PWM_ICU/make/at-start-f415.make @@ -105,7 +105,7 @@ include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_at32f415.mk # HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/AT32F415/platform.mk include $(CHIBIOS_CONTRIB)/os/hal/boards/AT_START_F415/board.mk include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk diff --git a/testhal/AT32/multi/SDC-FATFS/.cproject b/testhal/AT32/multi/SDC-FATFS/.cproject new file mode 100644 index 0000000000..0905555dfa --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/.cproject @@ -0,0 +1,56 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/testhal/AT32/multi/SDC-FATFS/.project b/testhal/AT32/multi/SDC-FATFS/.project new file mode 100644 index 0000000000..c511fa869b --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/.project @@ -0,0 +1,78 @@ + + + AT32-SDC-FATFS + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + mingw32-make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/testhal/AT32/multi/SDC-FATFS/Makefile b/testhal/AT32/multi/SDC-FATFS/Makefile new file mode 100644 index 0000000000..c8606df05e --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/Makefile @@ -0,0 +1,18 @@ +############################################################################## +# Multi-project makefile rules +# + +all: + @echo + @echo === Building for AT-START-F415 ===================================== + +@make --no-print-directory -f ./make/at-start-f415.make all + @echo ==================================================================== + @echo + +clean: + @echo + +@make --no-print-directory -f ./make/at-start-f415.make clean + @echo + +# +############################################################################## diff --git a/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/chconf.h b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/chconf.h new file mode 100644 index 0000000000..46b3f78b68 --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/chconf.h @@ -0,0 +1,842 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_7_0_ + +/*===========================================================================*/ +/** + * @name System settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Handling of instances. + * @note If enabled then threads assigned to various instances can + * interact each other using the same synchronization objects. + * If disabled then each OS instance is a separate world, no + * direct interactions are handled by the OS. + */ +#if !defined(CH_CFG_SMP_MODE) +#define CH_CFG_SMP_MODE FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 10000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** + * @brief Kernel hardening level. + * @details This option is the level of functional-safety checks enabled + * in the kerkel. The meaning is: + * - 0: No checks, maximum performance. + * - 1: Reasonable checks. + * - 2: All checks. + * . + */ +#if !defined(CH_CFG_HARDENING_LEVEL) +#define CH_CFG_HARDENING_LEVEL 0 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM TRUE +#endif + +/** + * @brief Time Stamps APIs. + * @details If enabled then the time stamps APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TIMESTAMP) +#define CH_CFG_USE_TIMESTAMP TRUE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name OSLIB options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Memory checks APIs. + * @details If enabled then the memory checks APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCHECKS) +#define CH_CFG_USE_MEMCHECKS TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES TRUE +#endif + +/** + * @brief Objects Caches APIs. + * @details If enabled then the objects caches APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_CACHES) +#define CH_CFG_USE_OBJ_CACHES TRUE +#endif + +/** + * @brief Delegate threads APIs. + * @details If enabled then the delegate threads APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_DELEGATES) +#define CH_CFG_USE_DELEGATES TRUE +#endif + +/** + * @brief Jobs Queues APIs. + * @details If enabled then the jobs queues APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_JOBS) +#define CH_CFG_USE_JOBS TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add system custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add system initialization code here.*/ \ +} + +/** + * @brief OS instance structure extension. + * @details User fields added to the end of the @p os_instance_t structure. + */ +#define CH_CFG_OS_INSTANCE_EXTRA_FIELDS \ + /* Add OS instance custom fields here.*/ + +/** + * @brief OS instance initialization hook. + * + * @param[in] oip pointer to the @p os_instance_t structure + */ +#define CH_CFG_OS_INSTANCE_INIT_HOOK(oip) { \ + /* Add OS instance initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + * + * @param[in] tp pointer to the @p thread_t structure + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @param[in] tp pointer to the @p thread_t structure + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + * + * @param[in] ntp thread being switched in + * @param[in] otp thread being switched out + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** + * @brief Runtime Faults Collection Unit hook. + * @details This hook is invoked each time new faults are collected and stored. + */ +#define CH_CFG_RUNTIME_FAULTS_HOOK(mask) { \ + /* Faults handling code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/config.h b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/config.h new file mode 100644 index 0000000000..361e185d9c --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/config.h @@ -0,0 +1,39 @@ +/* + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * CRC driver system settings. + */ +#define AT32_CRC_USE_CRC1 FALSE + +#define CRC_USE_DMA FALSE +#define AT32_CRC_CRC1_DMA_PRIORITY 2 +#define AT32_CRC_CRC1_IRQ_PRIORITY 5 +#define AT32_CRC_CRC1_DMA_STREAM AT32_DMA1_STREAM2 + +/* + * I2C fallback driver system settings. + */ +#define SW_I2C_USE_I2C1 FALSE +#define SW_I2C_USE_I2C2 FALSE +#define SW_I2C_USE_I2C3 FALSE +#define SW_I2C_USE_I2C4 FALSE + +/* + * Other settings. + */ +#define BOARD_OTG_VBUSIG diff --git a/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/ffconf.h b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/ffconf.h new file mode 100644 index 0000000000..43ec9ae10b --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/ffconf.h @@ -0,0 +1,303 @@ +/* CHIBIOS FIX */ +#include "ch.h" + +/*---------------------------------------------------------------------------/ +/ FatFs Functional Configurations +/---------------------------------------------------------------------------*/ + +#define FFCONF_DEF 86631 /* Revision ID */ + +/*---------------------------------------------------------------------------/ +/ Function Configurations +/---------------------------------------------------------------------------*/ + +#define FF_FS_READONLY 0 +/* This option switches read-only configuration. (0:Read/Write or 1:Read-only) +/ Read-only configuration removes writing API functions, f_write(), f_sync(), +/ f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree() +/ and optional writing functions as well. */ + + +#define FF_FS_MINIMIZE 0 +/* This option defines minimization level to remove some basic API functions. +/ +/ 0: Basic functions are fully enabled. +/ 1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_truncate() and f_rename() +/ are removed. +/ 2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1. +/ 3: f_lseek() function is removed in addition to 2. */ + + +#define FF_USE_FIND 0 +/* This option switches filtered directory read functions, f_findfirst() and +/ f_findnext(). (0:Disable, 1:Enable 2:Enable with matching altname[] too) */ + + +#define FF_USE_MKFS 0 +/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */ + + +#define FF_USE_FASTSEEK 0 +/* This option switches fast seek function. (0:Disable or 1:Enable) */ + + +#define FF_USE_EXPAND 0 +/* This option switches f_expand function. (0:Disable or 1:Enable) */ + + +#define FF_USE_CHMOD 0 +/* This option switches attribute manipulation functions, f_chmod() and f_utime(). +/ (0:Disable or 1:Enable) Also FF_FS_READONLY needs to be 0 to enable this option. */ + + +#define FF_USE_LABEL 0 +/* This option switches volume label functions, f_getlabel() and f_setlabel(). +/ (0:Disable or 1:Enable) */ + + +#define FF_USE_FORWARD 0 +/* This option switches f_forward() function. (0:Disable or 1:Enable) */ + + +#define FF_USE_STRFUNC 0 +#define FF_PRINT_LLI 0 +#define FF_PRINT_FLOAT 0 +#define FF_STRF_ENCODE 0 +/* FF_USE_STRFUNC switches string functions, f_gets(), f_putc(), f_puts() and +/ f_printf(). +/ +/ 0: Disable. FF_PRINT_LLI, FF_PRINT_FLOAT and FF_STRF_ENCODE have no effect. +/ 1: Enable without LF-CRLF conversion. +/ 2: Enable with LF-CRLF conversion. +/ +/ FF_PRINT_LLI = 1 makes f_printf() support long long argument and FF_PRINT_FLOAT = 1/2 + makes f_printf() support floating point argument. These features want C99 or later. +/ When FF_LFN_UNICODE >= 1 with LFN enabled, string functions convert the character +/ encoding in it. FF_STRF_ENCODE selects assumption of character encoding ON THE FILE +/ to be read/written via those functions. +/ +/ 0: ANSI/OEM in current CP +/ 1: Unicode in UTF-16LE +/ 2: Unicode in UTF-16BE +/ 3: Unicode in UTF-8 +*/ + + +/*---------------------------------------------------------------------------/ +/ Locale and Namespace Configurations +/---------------------------------------------------------------------------*/ + +#define FF_CODE_PAGE 850 +/* This option specifies the OEM code page to be used on the target system. +/ Incorrect code page setting can cause a file open failure. +/ +/ 437 - U.S. +/ 720 - Arabic +/ 737 - Greek +/ 771 - KBL +/ 775 - Baltic +/ 850 - Latin 1 +/ 852 - Latin 2 +/ 855 - Cyrillic +/ 857 - Turkish +/ 860 - Portuguese +/ 861 - Icelandic +/ 862 - Hebrew +/ 863 - Canadian French +/ 864 - Arabic +/ 865 - Nordic +/ 866 - Russian +/ 869 - Greek 2 +/ 932 - Japanese (DBCS) +/ 936 - Simplified Chinese (DBCS) +/ 949 - Korean (DBCS) +/ 950 - Traditional Chinese (DBCS) +/ 0 - Include all code pages above and configured by f_setcp() +*/ + + +#define FF_USE_LFN 3 +#define FF_MAX_LFN 255 +/* The FF_USE_LFN switches the support for LFN (long file name). +/ +/ 0: Disable LFN. FF_MAX_LFN has no effect. +/ 1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe. +/ 2: Enable LFN with dynamic working buffer on the STACK. +/ 3: Enable LFN with dynamic working buffer on the HEAP. +/ +/ To enable the LFN, ffunicode.c needs to be added to the project. The LFN function +/ requiers certain internal working buffer occupies (FF_MAX_LFN + 1) * 2 bytes and +/ additional (FF_MAX_LFN + 44) / 15 * 32 bytes when exFAT is enabled. +/ The FF_MAX_LFN defines size of the working buffer in UTF-16 code unit and it can +/ be in range of 12 to 255. It is recommended to be set it 255 to fully support LFN +/ specification. +/ When use stack for the working buffer, take care on stack overflow. When use heap +/ memory for the working buffer, memory management functions, ff_memalloc() and +/ ff_memfree() exemplified in ffsystem.c, need to be added to the project. */ + + +#define FF_LFN_UNICODE 0 +/* This option switches the character encoding on the API when LFN is enabled. +/ +/ 0: ANSI/OEM in current CP (TCHAR = char) +/ 1: Unicode in UTF-16 (TCHAR = WCHAR) +/ 2: Unicode in UTF-8 (TCHAR = char) +/ 3: Unicode in UTF-32 (TCHAR = DWORD) +/ +/ Also behavior of string I/O functions will be affected by this option. +/ When LFN is not enabled, this option has no effect. */ + + +#define FF_LFN_BUF 255 +#define FF_SFN_BUF 12 +/* This set of options defines size of file name members in the FILINFO structure +/ which is used to read out directory items. These values should be suffcient for +/ the file names to read. The maximum possible length of the read file name depends +/ on character encoding. When LFN is not enabled, these options have no effect. */ + + +#define FF_FS_RPATH 0 +/* This option configures support for relative path. +/ +/ 0: Disable relative path and remove related functions. +/ 1: Enable relative path. f_chdir() and f_chdrive() are available. +/ 2: f_getcwd() function is available in addition to 1. +*/ + + +/*---------------------------------------------------------------------------/ +/ Drive/Volume Configurations +/---------------------------------------------------------------------------*/ + +#define FF_VOLUMES 1 +/* Number of volumes (logical drives) to be used. (1-10) */ + + +#define FF_STR_VOLUME_ID 0 +#define FF_VOLUME_STRS "RAM","NAND","CF","SD","SD2","USB","USB2","USB3" +/* FF_STR_VOLUME_ID switches support for volume ID in arbitrary strings. +/ When FF_STR_VOLUME_ID is set to 1 or 2, arbitrary strings can be used as drive +/ number in the path name. FF_VOLUME_STRS defines the volume ID strings for each +/ logical drives. Number of items must not be less than FF_VOLUMES. Valid +/ characters for the volume ID strings are A-Z, a-z and 0-9, however, they are +/ compared in case-insensitive. If FF_STR_VOLUME_ID >= 1 and FF_VOLUME_STRS is +/ not defined, a user defined volume string table needs to be defined as: +/ +/ const char* VolumeStr[FF_VOLUMES] = {"ram","flash","sd","usb",... +*/ + + +#define FF_MULTI_PARTITION 0 +/* This option switches support for multiple volumes on the physical drive. +/ By default (0), each logical drive number is bound to the same physical drive +/ number and only an FAT volume found on the physical drive will be mounted. +/ When this function is enabled (1), each logical drive number can be bound to +/ arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk() +/ funciton will be available. */ + + +#define FF_MIN_SS 512 +#define FF_MAX_SS 512 +/* This set of options configures the range of sector size to be supported. (512, +/ 1024, 2048 or 4096) Always set both 512 for most systems, generic memory card and +/ harddisk, but a larger value may be required for on-board flash memory and some +/ type of optical media. When FF_MAX_SS is larger than FF_MIN_SS, FatFs is configured +/ for variable sector size mode and disk_ioctl() function needs to implement +/ GET_SECTOR_SIZE command. */ + + +#define FF_LBA64 0 +/* This option switches support for 64-bit LBA. (0:Disable or 1:Enable) +/ To enable the 64-bit LBA, also exFAT needs to be enabled. (FF_FS_EXFAT == 1) */ + + +#define FF_MIN_GPT 0x10000000 +/* Minimum number of sectors to switch GPT as partitioning format in f_mkfs and +/ f_fdisk function. 0x100000000 max. This option has no effect when FF_LBA64 == 0. */ + + +#define FF_USE_TRIM 0 +/* This option switches support for ATA-TRIM. (0:Disable or 1:Enable) +/ To enable Trim function, also CTRL_TRIM command should be implemented to the +/ disk_ioctl() function. */ + + + +/*---------------------------------------------------------------------------/ +/ System Configurations +/---------------------------------------------------------------------------*/ + +#define FF_FS_TINY 0 +/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny) +/ At the tiny configuration, size of file object (FIL) is shrinked FF_MAX_SS bytes. +/ Instead of private sector buffer eliminated from the file object, common sector +/ buffer in the filesystem object (FATFS) is used for the file data transfer. */ + + +#define FF_FS_EXFAT 1 +/* This option switches support for exFAT filesystem. (0:Disable or 1:Enable) +/ To enable exFAT, also LFN needs to be enabled. (FF_USE_LFN >= 1) +/ Note that enabling exFAT discards ANSI C (C89) compatibility. */ + + +#define FF_FS_NORTC 0 +#define FF_NORTC_MON 1 +#define FF_NORTC_MDAY 1 +#define FF_NORTC_YEAR 2020 +/* The option FF_FS_NORTC switches timestamp functiton. If the system does not have +/ any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable +/ the timestamp function. Every object modified by FatFs will have a fixed timestamp +/ defined by FF_NORTC_MON, FF_NORTC_MDAY and FF_NORTC_YEAR in local time. +/ To enable timestamp function (FF_FS_NORTC = 0), get_fattime() function need to be +/ added to the project to read current time form real-time clock. FF_NORTC_MON, +/ FF_NORTC_MDAY and FF_NORTC_YEAR have no effect. +/ These options have no effect in read-only configuration (FF_FS_READONLY = 1). */ + + +#define FF_FS_NOFSINFO 0 +/* If you need to know correct free space on the FAT32 volume, set bit 0 of this +/ option, and f_getfree() function at first time after volume mount will force +/ a full FAT scan. Bit 1 controls the use of last allocated cluster number. +/ +/ bit0=0: Use free cluster count in the FSINFO if available. +/ bit0=1: Do not trust free cluster count in the FSINFO. +/ bit1=0: Use last allocated cluster number in the FSINFO if available. +/ bit1=1: Do not trust last allocated cluster number in the FSINFO. +*/ + + +#define FF_FS_LOCK 0 +/* The option FF_FS_LOCK switches file lock function to control duplicated file open +/ and illegal operation to open objects. This option must be 0 when FF_FS_READONLY +/ is 1. +/ +/ 0: Disable file lock function. To avoid volume corruption, application program +/ should avoid illegal open, remove and rename to the open objects. +/ >0: Enable file lock function. The value defines how many files/sub-directories +/ can be opened simultaneously under file lock control. Note that the file +/ lock control is independent of re-entrancy. */ + + +#define FF_FS_REENTRANT 0 +#define FF_FS_TIMEOUT TIME_MS2I(1000) +#define FF_SYNC_t semaphore_t* +/* The option FF_FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs +/ module itself. Note that regardless of this option, file access to different +/ volume is always re-entrant and volume control functions, f_mount(), f_mkfs() +/ and f_fdisk() function, are always not re-entrant. Only file/directory access +/ to the same volume is under control of this function. +/ +/ 0: Disable re-entrancy. FF_FS_TIMEOUT and FF_SYNC_t have no effect. +/ 1: Enable re-entrancy. Also user provided synchronization handlers, +/ ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj() +/ function, must be added to the project. Samples are available in +/ option/syscall.c. +/ +/ The FF_FS_TIMEOUT defines timeout period in unit of time tick. +/ The FF_SYNC_t defines O/S dependent sync object type. e.g. HANDLE, ID, OS_EVENT*, +/ SemaphoreHandle_t and etc. A header file for O/S definitions needs to be +/ included somewhere in the scope of ff.h. */ + + + +/*--- End of configuration options ---*/ diff --git a/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/halconf.h b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/halconf.h new file mode 100644 index 0000000000..825b931c85 --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/halconf.h @@ -0,0 +1,557 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_8_4_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EFlash subsystem. + */ +#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__) +#define HAL_USE_EFL FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Timeout before assuming a failure while waiting for card idle. + * @note Time is in milliseconds. + */ +#if !defined(MMC_IDLE_TIMEOUT_MS) || defined(__DOXYGEN__) +#define MMC_IDLE_TIMEOUT_MS 1000 +#endif + +/** + * @brief Mutual exclusion on the SPI bus. + */ +#if !defined(MMC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define MMC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SIO driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SIO_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SIO_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Support for thread synchronization API. + */ +#if !defined(SIO_USE_SYNCHRONIZATION) || defined(__DOXYGEN__) +#define SIO_USE_SYNCHRONIZATION TRUE +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Inserts an assertion on function errors before returning. + */ +#if !defined(SPI_USE_ASSERT_ON_ERROR) || defined(__DOXYGEN__) +#define SPI_USE_ASSERT_ON_ERROR TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#include "halconf_community.h" + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/halconf_community.h b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/halconf_community.h new file mode 100644 index 0000000000..c43d668764 --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/halconf_community.h @@ -0,0 +1,182 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the COMP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the OPAMP subsystem. + */ +#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__) +#define HAL_USE_OPAMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/mcuconf.h b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/mcuconf.h new file mode 100644 index 0000000000..f7ab0e5ef7 --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/mcuconf.h @@ -0,0 +1,242 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * AT32F415 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define AT32F415_MCUCONF + +/* + * General settings. + */ +#define AT32_NO_INIT FALSE + +/* + * HAL driver system settings. + */ +#define AT32_HICK_ENABLED TRUE +#define AT32_LICK_ENABLED FALSE +#define AT32_HEXT_ENABLED TRUE +#define AT32_LEXT_ENABLED FALSE +#define AT32_SCLKSEL AT32_SCLKSEL_PLL +#define AT32_PLLRCS AT32_PLLRCS_HEXT +#define AT32_PLLHEXTDIV AT32_PLLHEXTDIV_DIV1 +#define AT32_PLLCFGEN AT32_PLLCFGEN_SOLID +#define AT32_PLLMULT_VALUE 18 +#define AT32_PLL_FR_VALUE 4 +#define AT32_PLL_MS_VALUE 1 +#define AT32_PLL_NS_VALUE 72 +#define AT32_AHBDIV AT32_AHBDIV_DIV4 +#define AT32_APB1DIV AT32_APB1DIV_DIV1 +#define AT32_APB2DIV AT32_APB2DIV_DIV1 +#define AT32_ADCDIV AT32_ADCDIV_DIV4 +#define AT32_USB_CLOCK_REQUIRED TRUE +#define AT32_USBDIV AT32_USBDIV_DIV3 +#define AT32_CLKOUT_SEL AT32_CLKOUT_SEL_NOCLOCK +#define AT32_CLKOUTDIV AT32_CLKOUTDIV_DIV1 +#define AT32_ERTCSEL AT32_ERTCSEL_NOCLOCK +#define AT32_PVM_ENABLE FALSE +#define AT32_PVMSEL AT32_PVMSEL_LEV1 + +/* + * IRQ system settings. + */ +#define AT32_IRQ_EXINT0_PRIORITY 6 +#define AT32_IRQ_EXINT1_PRIORITY 6 +#define AT32_IRQ_EXINT2_PRIORITY 6 +#define AT32_IRQ_EXINT3_PRIORITY 6 +#define AT32_IRQ_EXINT4_PRIORITY 6 +#define AT32_IRQ_EXINT5_9_PRIORITY 6 +#define AT32_IRQ_EXINT10_15_PRIORITY 6 +#define AT32_IRQ_EXINT16_PRIORITY 6 +#define AT32_IRQ_EXINT17_PRIORITY 15 +#define AT32_IRQ_EXINT18_PRIORITY 6 +#define AT32_IRQ_EXINT19_PRIORITY 6 +#define AT32_IRQ_EXINT20_PRIORITY 6 +#define AT32_IRQ_EXINT21_PRIORITY 15 +#define AT32_IRQ_EXINT22_PRIORITY 15 + +#define AT32_IRQ_TMR1_BRK_TMR9_PRIORITY 7 +#define AT32_IRQ_TMR1_OVF_TMR10_PRIORITY 7 +#define AT32_IRQ_TMR1_HALL_TMR11_PRIORITY 7 +#define AT32_IRQ_TMR1_CH_PRIORITY 7 +#define AT32_IRQ_TMR2_PRIORITY 7 +#define AT32_IRQ_TMR3_PRIORITY 7 +#define AT32_IRQ_TMR4_PRIORITY 7 +#define AT32_IRQ_TMR5_PRIORITY 7 + +#define AT32_IRQ_USART1_PRIORITY 12 +#define AT32_IRQ_USART2_PRIORITY 12 +#define AT32_IRQ_USART3_PRIORITY 12 +#define AT32_IRQ_UART4_PRIORITY 12 +#define AT32_IRQ_UART5_PRIORITY 12 + +/* + * ADC driver system settings. + */ +#define AT32_ADC_USE_ADC1 FALSE +#define AT32_ADC_ADC1_DMA_PRIORITY 2 +#define AT32_ADC_ADC1_IRQ_PRIORITY 6 + +/* + * CAN driver system settings. + */ +#define AT32_CAN_USE_CAN1 FALSE +#define AT32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * DMA driver system settings. + */ +#define AT32_DMA_USE_DMAMUX FALSE + +/* + * GPT driver system settings. + */ +#define AT32_GPT_USE_TMR1 FALSE +#define AT32_GPT_USE_TMR2 FALSE +#define AT32_GPT_USE_TMR3 FALSE +#define AT32_GPT_USE_TMR4 FALSE +#define AT32_GPT_USE_TMR5 FALSE +#define AT32_GPT_USE_TMR9 FALSE +#define AT32_GPT_USE_TMR10 FALSE +#define AT32_GPT_USE_TMR11 FALSE + +/* + * I2C driver system settings. + */ +#define AT32_I2C_USE_I2C1 FALSE +#define AT32_I2C_USE_I2C2 FALSE +#define AT32_I2C_BUSY_TIMEOUT 50 +#define AT32_I2C_I2C1_DMA_PRIORITY 3 +#define AT32_I2C_I2C2_DMA_PRIORITY 3 +#define AT32_I2C_I2C1_IRQ_PRIORITY 5 +#define AT32_I2C_I2C2_IRQ_PRIORITY 5 +#define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define AT32_ICU_USE_TMR1 FALSE +#define AT32_ICU_USE_TMR2 FALSE +#define AT32_ICU_USE_TMR3 FALSE +#define AT32_ICU_USE_TMR4 FALSE +#define AT32_ICU_USE_TMR5 FALSE +#define AT32_ICU_USE_TMR9 FALSE +#define AT32_ICU_USE_TMR10 FALSE +#define AT32_ICU_USE_TMR11 FALSE + +/* + * PWM driver system settings. + */ +#define AT32_PWM_USE_TMR1 FALSE +#define AT32_PWM_USE_TMR2 FALSE +#define AT32_PWM_USE_TMR3 FALSE +#define AT32_PWM_USE_TMR4 FALSE +#define AT32_PWM_USE_TMR5 FALSE +#define AT32_PWM_USE_TMR9 FALSE +#define AT32_PWM_USE_TMR10 FALSE +#define AT32_PWM_USE_TMR11 FALSE + +/* + * RTC driver system settings. + */ +#define AT32_ERTC_DIVA_VALUE 32 +#define AT32_ERTC_DIVB_VALUE 1024 +#define AT32_ERTC_CTRL_INIT 0 +#define AT32_ERTC_TAMP_INIT 0 + +/* + * SDC driver system settings. + */ +#define AT32_SDC_SDIO_DMA_PRIORITY 3 +#define AT32_SDC_SDIO_IRQ_PRIORITY 9 +#define AT32_SDC_WRITE_TIMEOUT_MS 1000 +#define AT32_SDC_READ_TIMEOUT_MS 1000 +#define AT32_SDC_CLOCK_ACTIVATION_DELAY 10 +#define AT32_SDC_SDIO_UNALIGNED_SUPPORT TRUE + +/* + * SERIAL driver system settings. + */ +#define AT32_SERIAL_USE_USART1 TRUE +#define AT32_SERIAL_USE_USART2 FALSE +#define AT32_SERIAL_USE_USART3 FALSE +#define AT32_SERIAL_USE_UART4 FALSE +#define AT32_SERIAL_USE_UART5 FALSE + +/* + * SPI driver system settings. + */ +#define AT32_SPI_USE_SPI1 FALSE +#define AT32_SPI_USE_SPI2 FALSE +#define AT32_SPI_SPI1_DMA_PRIORITY 1 +#define AT32_SPI_SPI2_DMA_PRIORITY 1 +#define AT32_SPI_SPI1_IRQ_PRIORITY 10 +#define AT32_SPI_SPI2_IRQ_PRIORITY 10 +#define AT32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define AT32_ST_IRQ_PRIORITY 8 +#define AT32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define AT32_UART_USE_USART1 FALSE +#define AT32_UART_USE_USART2 FALSE +#define AT32_UART_USE_USART3 FALSE +#define AT32_UART_USE_UART4 FALSE +#define AT32_UART_USE_UART5 FALSE +#define AT32_UART_USART1_DMA_PRIORITY 0 +#define AT32_UART_USART2_DMA_PRIORITY 0 +#define AT32_UART_USART3_DMA_PRIORITY 0 +#define AT32_UART_UART4_DMA_PRIORITY 0 +#define AT32_UART_UART5_DMA_PRIORITY 0 +#define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define AT32_USB_USE_OTG1 FALSE +#define AT32_USB_OTG1_IRQ_PRIORITY 14 +#define AT32_USB_OTG1_RX_FIFO_SIZE 512 + +/* + * WDG driver system settings. + */ +#define AT32_WDG_USE_WDT FALSE + +#include "config.h" + +#endif /* MCUCONF_H */ diff --git a/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/portab.c b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/portab.c new file mode 100644 index 0000000000..25e871321a --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/portab.c @@ -0,0 +1,59 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file portab.c + * @brief Application portability module code. + * + * @addtogroup application_portability + * @{ + */ + +#include "hal.h" + +#include "portab.h" + +/*===========================================================================*/ +/* Module local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module exported functions. */ +/*===========================================================================*/ + +void portab_setup(void) { + +} + +/** @} */ diff --git a/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/portab.h b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/portab.h new file mode 100644 index 0000000000..ccb75be217 --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/cfg/at-start-f415/portab.h @@ -0,0 +1,78 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file portab.h + * @brief Application portability macros and structures. + * + * @addtogroup application_portability + * @{ + */ + +#ifndef PORTAB_H +#define PORTAB_H + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#define PORTAB_SDC1 SDCD1 + +#define PORTAB_SD1 SD1 + +#define PORTAB_BLINK_LED1 LINE_LED_RED + +#define PORTAB_BLINK_LED2 LINE_LED_YELLOW + +#define PORTAB_BLINK_LED3 LINE_LED_GREEN + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void portab_setup(void); +#ifdef __cplusplus +} +#endif + +/*===========================================================================*/ +/* Module inline functions. */ +/*===========================================================================*/ + +#endif /* PORTAB_H */ + +/** @} */ diff --git a/testhal/AT32/multi/SDC-FATFS/main.c b/testhal/AT32/multi/SDC-FATFS/main.c new file mode 100644 index 0000000000..640f41c000 --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/main.c @@ -0,0 +1,365 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include +#include + +#include "ch.h" +#include "hal.h" + +#include "rt_test_root.h" +#include "oslib_test_root.h" + +#include "shell.h" +#include "chprintf.h" + +#include "ff.h" + +#include "portab.h" + +/*===========================================================================*/ +/* Card insertion monitor. */ +/*===========================================================================*/ + +#define POLLING_INTERVAL 10 +#define POLLING_DELAY 10 + +/** + * @brief Card monitor timer. + */ +static virtual_timer_t tmr; + +/** + * @brief Debounce counter. + */ +static unsigned cnt; + +/** + * @brief Card event sources. + */ +static event_source_t inserted_event, removed_event; + +/** + * @brief Insertion monitor timer callback function. + * + * @param[in] p pointer to the @p BaseBlockDevice object + * + * @notapi + */ +static void tmrfunc(virtual_timer_t *vtp, void *p) { + BaseBlockDevice *bbdp = p; + + chSysLockFromISR(); + if (cnt > 0) { + if (blkIsInserted(bbdp)) { + if (--cnt == 0) { + chEvtBroadcastI(&inserted_event); + } + } + else + cnt = POLLING_INTERVAL; + } + else { + if (!blkIsInserted(bbdp)) { + cnt = POLLING_INTERVAL; + chEvtBroadcastI(&removed_event); + } + } + chVTSetI(vtp, TIME_MS2I(POLLING_DELAY), tmrfunc, bbdp); + chSysUnlockFromISR(); +} + +/** + * @brief Polling monitor start. + * + * @param[in] p pointer to an object implementing @p BaseBlockDevice + * + * @notapi + */ +static void tmr_init(void *p) { + chEvtObjectInit(&inserted_event); + chEvtObjectInit(&removed_event); + chSysLock(); + cnt = POLLING_INTERVAL; + chVTSetI(&tmr, TIME_MS2I(POLLING_DELAY), tmrfunc, p); + chSysUnlock(); +} + +/*===========================================================================*/ +/* FatFs related. */ +/*===========================================================================*/ + +/** + * @brief FS object. + */ +static FATFS SDC_FS; + +/* FS mounted and ready.*/ +static bool fs_ready = FALSE; + +/* Generic large buffer.*/ +static uint8_t fbuff[1024]; + +static FRESULT scan_files(BaseSequentialStream *chp, char *path) { + static FILINFO fno; + FRESULT res; + DIR dir; + size_t i; + char *fn; + + res = f_opendir(&dir, path); + if (res == FR_OK) { + i = strlen(path); + while (((res = f_readdir(&dir, &fno)) == FR_OK) && fno.fname[0]) { + if (FF_FS_RPATH && fno.fname[0] == '.') + continue; + fn = fno.fname; + if (fno.fattrib & AM_DIR) { + *(path + i) = '/'; + strcpy(path + i + 1, fn); + res = scan_files(chp, path); + *(path + i) = '\0'; + if (res != FR_OK) + break; + } + else { + chprintf(chp, "%s/%s\r\n", path, fn); + } + } + } + return res; +} + +/*===========================================================================*/ +/* Command line related. */ +/*===========================================================================*/ + +#define SHELL_WA_SIZE THD_WORKING_AREA_SIZE(2048) + +static void cmd_tree(BaseSequentialStream *chp, int argc, char *argv[]) { + FRESULT err; + uint32_t fre_clust; + FATFS *fsp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: tree\r\n"); + return; + } + + if (!fs_ready) { + chprintf(chp, "File System not mounted\r\n"); + return; + } + + err = f_getfree("/", &fre_clust, &fsp); + if (err != FR_OK) { + chprintf(chp, "FS: f_getfree() failed\r\n"); + return; + } + + chprintf(chp, + "FS: %lu free clusters with %lu sectors (%lu bytes) per cluster\r\n", + fre_clust, (uint32_t)fsp->csize, (uint32_t)fsp->csize * 512); + fbuff[0] = 0; + scan_files(chp, (char *)fbuff); +} + +static void cmd_create(BaseSequentialStream *chp, int argc, char *argv[]) { + FRESULT err; + FIL f; + static const char data[] = "the quick brown fox jumps over the lazy dog"; + UINT btw = sizeof data - 1; + UINT bw; + + if (argc != 1) { + chprintf(chp, "Usage: create \r\n"); + return; + } + + if (!fs_ready) { + chprintf(chp, "File System not mounted\r\n"); + return; + } + + err = f_open(&f, (const TCHAR *)argv[0], FA_CREATE_ALWAYS | FA_WRITE); + if (err != FR_OK) { + chprintf(chp, "FS: f_open() failed\r\n"); + return; + } + + err = f_write(&f, (const void *)data, btw, &bw); + if (err != FR_OK) { + chprintf(chp, "FS: f_write() failed\r\n"); + } + + err = f_close(&f); + if (err != FR_OK) { + chprintf(chp, "FS: f_close() failed\r\n"); + return; + } +} + +static const ShellCommand commands[] = { + {"tree", cmd_tree}, + {"create", cmd_create}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseSequentialStream *)&PORTAB_SD1, + commands +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Pointer to the shell thread, if active, else NULL. + */ +static thread_t *shelltp = NULL; + +/* + * Card insertion event. + */ +static void InsertHandler(eventid_t id) { + FRESULT err; + + (void)id; + + /* + * On insertion SDC initialization and FS mount. + */ + if (sdcConnect(&PORTAB_SDC1)) + return; + + err = f_mount(&SDC_FS, "/", 1); + if (err != FR_OK) { + sdcDisconnect(&PORTAB_SDC1); + return; + } + fs_ready = TRUE; +} + +/* + * Card removal event. + */ +static void RemoveHandler(eventid_t id) { + + (void)id; + sdcDisconnect(&PORTAB_SDC1); + fs_ready = FALSE; +} + +/* + * Shell exit event. + */ +static void ShellHandler(eventid_t id) { + + (void)id; + if (chThdTerminatedX(shelltp)) { + chThdRelease(shelltp); + shelltp = NULL; + } +} + +/* + * LED blinker thread, times are in milliseconds. + */ +static THD_WORKING_AREA(waThread1, 128); +static THD_FUNCTION(Thread1, arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (true) { + palToggleLine(PORTAB_BLINK_LED1); + chThdSleepMilliseconds(fs_ready ? 250 : 500); + palToggleLine(PORTAB_BLINK_LED2); + chThdSleepMilliseconds(fs_ready ? 250 : 500); + palToggleLine(PORTAB_BLINK_LED3); + chThdSleepMilliseconds(fs_ready ? 250 : 500); + } +} + +/* + * Application entry point. + */ +int main(void) { + static const evhandler_t evhndl[] = { + InsertHandler, + RemoveHandler, + ShellHandler + }; + event_listener_t el0, el1, el2; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Board-dependent setup code. + */ + portab_setup(); + + /* + * Starting a serial port for test report output. + */ + sdStart(&PORTAB_SD1, NULL); + + /* + * Shell manager initialization. + */ + shellInit(); + + /* + * Initializes the SDC driver using default configuration. + */ + sdcStart(&PORTAB_SDC1, NULL); + + /* + * Initializes the card insertion monitor. + */ + tmr_init(&PORTAB_SDC1); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, handling SD card events and shell start/exit. + */ + chEvtRegister(&inserted_event, &el0, 0); + chEvtRegister(&removed_event, &el1, 1); + chEvtRegister(&shell_terminated, &el2, 2); + while (true) { + if (shelltp == NULL) { + shelltp = chThdCreateFromHeap(NULL, SHELL_WA_SIZE, + "shell", NORMALPRIO + 1, + shellThread, (void *)&shell_cfg1); + } + chEvtDispatch(evhndl, chEvtWaitOneTimeout(ALL_EVENTS, TIME_MS2I(500))); + } +} diff --git a/testhal/AT32/multi/SDC-FATFS/make/at-start-f415.make b/testhal/AT32/multi/SDC-FATFS/make/at-start-f415.make new file mode 100644 index 0000000000..29321960aa --- /dev/null +++ b/testhal/AT32/multi/SDC-FATFS/make/at-start-f415.make @@ -0,0 +1,199 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO). +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# Enable this if you want to use bitbang I2C. +ifeq ($(USE_HAL_I2C_FALLBACK),) + USE_HAL_I2C_FALLBACK = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# FPU-related options. +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, target, sources and paths +# + +# Define project name here +PROJECT = ch + +# Target settings. +MCU = cortex-m4 + +# Imported source files and paths. +CHIBIOS := ../../../../../ChibiOS +CHIBIOS_CONTRIB := ../../../.. +CONFDIR := ./cfg/at-start-f415 +BUILDDIR := ./build/at-start-f415 +DEPDIR := ./.dep/at-start-f415 + +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_at32f415.mk +# HAL-OSAL files (optional). +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/AT32F415/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/AT_START_F415/board.mk +include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMv7-M/compilers/GCC/mk/port.mk +# Auto-build files in ./source recursively. +include $(CHIBIOS)/tools/mk/autobuild.mk +# Other files (optional). +include $(CHIBIOS)/os/test/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk +include $(CHIBIOS)/os/hal/lib/streams/streams.mk +include $(CHIBIOS)/os/various/shell/shell.mk +include $(CHIBIOS)/os/various/fatfs_bindings/fatfs.mk + +# Define linker script file here. +LDSCRIPT= $(STARTUPLD_CONTRIB)/AT32F415xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + $(CONFDIR)/portab.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# List ASM source files here. +ASMSRC = $(ALLASMSRC) + +# List ASM with preprocessor source files here. +ASMXSRC = $(ALLXASMSRC) + +# Inclusion directories. +INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC) + +# Define C warning options here. +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here. +CPPWARN = -Wall -Wextra -Wundef + +# +# Project, target, sources and paths +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user section +############################################################################## + +############################################################################## +# Common rules +# + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk +include $(RULESPATH)/arm-none-eabi.mk +include $(RULESPATH)/rules.mk + +# +# Common rules +############################################################################## + +############################################################################## +# Custom rules +# + +# +# Custom rules +############################################################################## diff --git a/testhal/AT32/multi/SDC/.cproject b/testhal/AT32/multi/SDC/.cproject index 74701160a0..c3a0af3f8c 100644 --- a/testhal/AT32/multi/SDC/.cproject +++ b/testhal/AT32/multi/SDC/.cproject @@ -37,7 +37,7 @@ - + @@ -48,7 +48,7 @@ - + diff --git a/testhal/AT32/multi/SDC/cfg/at-start-f415/config.h b/testhal/AT32/multi/SDC/cfg/at-start-f415/config.h index 4fbd7cc3df..361e185d9c 100644 --- a/testhal/AT32/multi/SDC/cfg/at-start-f415/config.h +++ b/testhal/AT32/multi/SDC/cfg/at-start-f415/config.h @@ -1,5 +1,4 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio ChibiOS - Copyright (C) 2023..2024 HorrorTroll ChibiOS - Copyright (C) 2023..2024 Zhaqian @@ -16,6 +15,16 @@ limitations under the License. */ +/* + * CRC driver system settings. + */ +#define AT32_CRC_USE_CRC1 FALSE + +#define CRC_USE_DMA FALSE +#define AT32_CRC_CRC1_DMA_PRIORITY 2 +#define AT32_CRC_CRC1_IRQ_PRIORITY 5 +#define AT32_CRC_CRC1_DMA_STREAM AT32_DMA1_STREAM2 + /* * I2C fallback driver system settings. */ diff --git a/testhal/AT32/multi/SDC/cfg/at-start-f415/halconf.h b/testhal/AT32/multi/SDC/cfg/at-start-f415/halconf.h index 73c9e36b48..825b931c85 100644 --- a/testhal/AT32/multi/SDC/cfg/at-start-f415/halconf.h +++ b/testhal/AT32/multi/SDC/cfg/at-start-f415/halconf.h @@ -550,6 +550,8 @@ #define WSPI_USE_MUTUAL_EXCLUSION TRUE #endif +#include "halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/testhal/AT32/multi/SDC/cfg/at-start-f415/halconf_community.h b/testhal/AT32/multi/SDC/cfg/at-start-f415/halconf_community.h new file mode 100644 index 0000000000..c43d668764 --- /dev/null +++ b/testhal/AT32/multi/SDC/cfg/at-start-f415/halconf_community.h @@ -0,0 +1,182 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the COMP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the OPAMP subsystem. + */ +#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__) +#define HAL_USE_OPAMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/AT32/multi/SDC/cfg/at-start-f415/mcuconf.h b/testhal/AT32/multi/SDC/cfg/at-start-f415/mcuconf.h index 5afedd79a1..f7ab0e5ef7 100644 --- a/testhal/AT32/multi/SDC/cfg/at-start-f415/mcuconf.h +++ b/testhal/AT32/multi/SDC/cfg/at-start-f415/mcuconf.h @@ -55,15 +55,15 @@ #define AT32_PLL_FR_VALUE 4 #define AT32_PLL_MS_VALUE 1 #define AT32_PLL_NS_VALUE 72 -#define AT32_AHBDIV AT32_AHBDIV_DIV1 -#define AT32_APB1DIV AT32_APB1DIV_DIV2 -#define AT32_APB2DIV AT32_APB2DIV_DIV2 +#define AT32_AHBDIV AT32_AHBDIV_DIV4 +#define AT32_APB1DIV AT32_APB1DIV_DIV1 +#define AT32_APB2DIV AT32_APB2DIV_DIV1 #define AT32_ADCDIV AT32_ADCDIV_DIV4 #define AT32_USB_CLOCK_REQUIRED TRUE #define AT32_USBDIV AT32_USBDIV_DIV3 #define AT32_CLKOUT_SEL AT32_CLKOUT_SEL_NOCLOCK #define AT32_CLKOUTDIV AT32_CLKOUTDIV_DIV1 -#define AT32_ERTCSEL AT32_ERTCSEL_HEXTDIV +#define AT32_ERTCSEL AT32_ERTCSEL_NOCLOCK #define AT32_PVM_ENABLE FALSE #define AT32_PVMSEL AT32_PVMSEL_LEV1 @@ -136,10 +136,10 @@ #define AT32_I2C_USE_I2C1 FALSE #define AT32_I2C_USE_I2C2 FALSE #define AT32_I2C_BUSY_TIMEOUT 50 -#define AT32_I2C_I2C1_IRQ_PRIORITY 5 -#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_I2C1_DMA_PRIORITY 3 #define AT32_I2C_I2C2_DMA_PRIORITY 3 +#define AT32_I2C_I2C1_IRQ_PRIORITY 5 +#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* @@ -216,9 +216,13 @@ #define AT32_UART_USE_USART1 FALSE #define AT32_UART_USE_USART2 FALSE #define AT32_UART_USE_USART3 FALSE +#define AT32_UART_USE_UART4 FALSE +#define AT32_UART_USE_UART5 FALSE #define AT32_UART_USART1_DMA_PRIORITY 0 #define AT32_UART_USART2_DMA_PRIORITY 0 #define AT32_UART_USART3_DMA_PRIORITY 0 +#define AT32_UART_UART4_DMA_PRIORITY 0 +#define AT32_UART_UART5_DMA_PRIORITY 0 #define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* diff --git a/testhal/AT32/multi/SDC/cfg/at-start-f415/portab.c b/testhal/AT32/multi/SDC/cfg/at-start-f415/portab.c index 0e6bc7d6a1..25e871321a 100644 --- a/testhal/AT32/multi/SDC/cfg/at-start-f415/portab.c +++ b/testhal/AT32/multi/SDC/cfg/at-start-f415/portab.c @@ -36,14 +36,6 @@ /* Module exported variables. */ /*===========================================================================*/ -/* - * SDIO configuration. - */ -SDCConfig sdccfg = { - .bus_width = SDC_MODE_1BIT, - .slowdown = 0U -}; - /*===========================================================================*/ /* Module local types. */ /*===========================================================================*/ diff --git a/testhal/AT32/multi/SDC/cfg/at-start-f415/portab.h b/testhal/AT32/multi/SDC/cfg/at-start-f415/portab.h index 0c5d89d14e..ccb75be217 100644 --- a/testhal/AT32/multi/SDC/cfg/at-start-f415/portab.h +++ b/testhal/AT32/multi/SDC/cfg/at-start-f415/portab.h @@ -61,8 +61,6 @@ /* External declarations. */ /*===========================================================================*/ -extern SDCConfig sdccfg; - #ifdef __cplusplus extern "C" { #endif diff --git a/testhal/AT32/multi/SDC/main.c b/testhal/AT32/multi/SDC/main.c index c997f2fdc3..07de28b1bd 100644 --- a/testhal/AT32/multi/SDC/main.c +++ b/testhal/AT32/multi/SDC/main.c @@ -16,16 +16,26 @@ limitations under the License. */ +#include #include #include "ch.h" #include "hal.h" +#include "rt_test_root.h" +#include "oslib_test_root.h" + #include "shell.h" #include "chprintf.h" #include "portab.h" +#if defined(AT32_SDC_SDIO_UNALIGNED_SUPPORT) +#define PORTAB_UNALIGNED_SUPPORT AT32_SDC_SDIO_UNALIGNED_SUPPORT +#else +#error "unexpected definitions" +#endif + /*===========================================================================*/ /* Command line related. */ /*===========================================================================*/ @@ -39,7 +49,7 @@ static uint8_t buf[MMCSD_BLOCK_SIZE * SDC_BURST_SIZE + 4]; /* Additional buffer for sdcErase() test */ -static uint8_t buf2[MMCSD_BLOCK_SIZE * SDC_BURST_SIZE ]; +//static uint8_t buf2[MMCSD_BLOCK_SIZE * SDC_BURST_SIZE]; void cmd_sdc(BaseSequentialStream *chp, int argc, char *argv[]) { static const char *mode[] = {"SDV11", "SDV20", "MMC", NULL}; @@ -106,7 +116,7 @@ void cmd_sdc(BaseSequentialStream *chp, int argc, char *argv[]) { } while (chVTIsSystemTimeWithin(start, end)); chprintf(chp, "%D blocks/S, %D bytes/S\r\n", n, n * MMCSD_BLOCK_SIZE); -#if AT32_SDC_SDIO_UNALIGNED_SUPPORT +#if PORTAB_UNALIGNED_SUPPORT /* Single block read performance, unaligned.*/ chprintf(chp, "Single block unaligned read performance: "); start = chVTGetSystemTime(); @@ -134,7 +144,7 @@ void cmd_sdc(BaseSequentialStream *chp, int argc, char *argv[]) { n += SDC_BURST_SIZE; } while (chVTIsSystemTimeWithin(start, end)); chprintf(chp, "%D blocks/S, %D bytes/S\r\n", n, n * MMCSD_BLOCK_SIZE); -#endif /* AT32_SDC_SDIO_UNALIGNED_SUPPORT */ +#endif /* PORTAB_UNALIGNED_SUPPORT */ } if ((strcmp(argv[0], "write") == 0) || @@ -157,7 +167,7 @@ void cmd_sdc(BaseSequentialStream *chp, int argc, char *argv[]) { } chprintf(chp, "OK\r\n"); - for (i = 0; i < MMCSD_BLOCK_SIZE; i++) + for (i = 0; i < MMCSD_BLOCK_SIZE * 2; i++) buf[i] = i + 8; chprintf(chp, "Writing..."); if(sdcWrite(&PORTAB_SDC1, startblk, buf, 2)) { @@ -177,77 +187,90 @@ void cmd_sdc(BaseSequentialStream *chp, int argc, char *argv[]) { if ((strcmp(argv[0], "erase") == 0) || (strcmp(argv[0], "all") == 0)) { - /** - * Test sdcErase() - * Strategy: - * 1. Fill two blocks with non-constant data - * 2. Write two blocks starting at startblk - * 3. Erase the second of the two blocks - * 3.1. First block should be equal to the data written - * 3.2. Second block should NOT be equal too the data written (i.e. erased). - * 4. Erase both first and second block - * 4.1 Both blocks should not be equal to the data initially written - * Precondition: SDC_BURST_SIZE >= 2 - */ - memset(buf, 0, MMCSD_BLOCK_SIZE * 2); - memset(buf2, 0, MMCSD_BLOCK_SIZE * 2); - /* 1. */ - unsigned int i = 0; - for (; i < MMCSD_BLOCK_SIZE * 2; ++i) { - buf[i] = (i + 7) % 'T'; //Ensure block 1/2 are not equal - } - /* 2. */ - if(sdcWrite(&PORTAB_SDC1, startblk, buf, 2)) { - chprintf(chp, "sdcErase() test write failed\r\n"); - goto exittest; - } - /* 3. (erase) */ - if(sdcErase(&PORTAB_SDC1, startblk + 1, startblk + 2)) { - chprintf(chp, "sdcErase() failed\r\n"); - goto exittest; - } - sdcflags_t errflags = sdcGetAndClearErrors(&PORTAB_SDC1); - if(errflags) { - chprintf(chp, "sdcErase() yielded error flags: %d\r\n", errflags); - goto exittest; - } - if(sdcRead(&PORTAB_SDC1, startblk, buf2, 2)) { - chprintf(chp, "single-block sdcErase() failed\r\n"); - goto exittest; - } - /* 3.1. */ - if(memcmp(buf, buf2, MMCSD_BLOCK_SIZE) != 0) { - chprintf(chp, "sdcErase() non-erased block compare failed\r\n"); - goto exittest; - } - /* 3.2. */ - if(memcmp(buf + MMCSD_BLOCK_SIZE, - buf2 + MMCSD_BLOCK_SIZE, MMCSD_BLOCK_SIZE) == 0) { - chprintf(chp, "sdcErase() erased block compare failed\r\n"); - goto exittest; - } - /* 4. */ - if(sdcErase(&PORTAB_SDC1, startblk, startblk + 2)) { - chprintf(chp, "multi-block sdcErase() failed\r\n"); - goto exittest; - } - if(sdcRead(&PORTAB_SDC1, startblk, buf2, 2)) { - chprintf(chp, "single-block sdcErase() failed\r\n"); - goto exittest; - } - /* 4.1 */ - if(memcmp(buf, buf2, MMCSD_BLOCK_SIZE) == 0) { - chprintf(chp, "multi-block sdcErase() erased block compare failed\r\n"); - goto exittest; - } - if(memcmp(buf + MMCSD_BLOCK_SIZE, - buf2 + MMCSD_BLOCK_SIZE, MMCSD_BLOCK_SIZE) == 0) { - chprintf(chp, "multi-block sdcErase() erased block compare failed\r\n"); - goto exittest; - } - /* END of sdcErase() test */ + +// /** +// * Test sdcErase() +// * Strategy: +// * 1. Fill two blocks with non-constant data +// * 2. Write two blocks starting at startblk +// * 3. Erase the second of the two blocks +// * 3.1. First block should be equal to the data written +// * 3.2. Second block should NOT be equal too the data written (i.e. erased). +// * 4. Erase both first and second block +// * 4.1 Both blocks should not be equal to the data initially written +// * Precondition: SDC_BURST_SIZE >= 2 +// */ +// memset(buf, 0, MMCSD_BLOCK_SIZE * 2); +// memset(buf2, 0, MMCSD_BLOCK_SIZE * 2); +// +// /* 1. */ +// unsigned int i = 0; +// for (; i < MMCSD_BLOCK_SIZE * 2; ++i) { +// buf[i] = (i + 7) % 'T'; //Ensure block 1/2 are not equal +// } +// +// /* 2. */ +// if(sdcWrite(&PORTAB_SDC1, startblk, buf, 2)) { +// chprintf(chp, "sdcErase() test write failed\r\n"); +// goto exittest; +// } +// +// /* 3. (erase) */ +// if(sdcErase(&PORTAB_SDC1, startblk + 1, startblk + 2)) { +// chprintf(chp, "sdcErase() failed\r\n"); +// goto exittest; +// } +// +// sdcflags_t errflags = sdcGetAndClearErrors(&PORTAB_SDC1); +// if(errflags) { +// chprintf(chp, "sdcErase() yielded error flags: %d\r\n", errflags); +// goto exittest; +// } +// +// if(sdcRead(&PORTAB_SDC1, startblk, buf2, 2)) { +// chprintf(chp, "single-block sdcErase() failed\r\n"); +// goto exittest; +// } +// +// /* 3.1. */ +// if(memcmp(buf, buf2, MMCSD_BLOCK_SIZE) != 0) { +// chprintf(chp, "sdcErase() non-erased block compare failed\r\n"); +// goto exittest; +// } +// +// /* 3.2. */ +// if(memcmp(buf + MMCSD_BLOCK_SIZE, +// buf2 + MMCSD_BLOCK_SIZE, MMCSD_BLOCK_SIZE) == 0) { +// chprintf(chp, "sdcErase() erased block compare failed\r\n"); +// goto exittest; +// } +// +// /* 4. */ +// if(sdcErase(&PORTAB_SDC1, startblk, startblk + 2)) { +// chprintf(chp, "multi-block sdcErase() failed\r\n"); +// goto exittest; +// } +// +// if(sdcRead(&PORTAB_SDC1, startblk, buf2, 2)) { +// chprintf(chp, "single-block sdcErase() failed\r\n"); +// goto exittest; +// } +// +// /* 4.1 */ +// if(memcmp(buf, buf2, MMCSD_BLOCK_SIZE) == 0) { +// chprintf(chp, "multi-block sdcErase() erased block compare failed\r\n"); +// goto exittest; +// } +// +// if(memcmp(buf + MMCSD_BLOCK_SIZE, +// buf2 + MMCSD_BLOCK_SIZE, MMCSD_BLOCK_SIZE) == 0) { +// chprintf(chp, "multi-block sdcErase() erased block compare failed\r\n"); +// goto exittest; +// } +// /* END of sdcErase() test */ + chprintf(chp, "Erase command is under construction!!!\r\n"); } - + /* Card disconnect and command end.*/ exittest: sdcDisconnect(&PORTAB_SDC1); @@ -276,17 +299,11 @@ static THD_FUNCTION(Thread1, arg) { (void)arg; chRegSetThreadName("blinker"); while (true) { - palSetLine(PORTAB_BLINK_LED1); + palToggleLine(PORTAB_BLINK_LED1); chThdSleepMilliseconds(500); - palSetLine(PORTAB_BLINK_LED2); + palToggleLine(PORTAB_BLINK_LED2); chThdSleepMilliseconds(500); - palSetLine(PORTAB_BLINK_LED3); - chThdSleepMilliseconds(500); - palClearLine(PORTAB_BLINK_LED1); - chThdSleepMilliseconds(500); - palClearLine(PORTAB_BLINK_LED2); - chThdSleepMilliseconds(500); - palClearLine(PORTAB_BLINK_LED3); + palToggleLine(PORTAB_BLINK_LED3); chThdSleepMilliseconds(500); } } @@ -312,19 +329,19 @@ int main(void) { portab_setup(); /* - * Shell manager initialization. + * Starting a serial port for test report output. */ - shellInit(); + sdStart(&PORTAB_SD1, NULL); /* - * Activates the serial driver 6 using the driver default configuration. + * Shell manager initialization. */ - sdStart(&PORTAB_SD1, NULL); + shellInit(); /* - * Initializes the SDIO drivers. + * Initializes the SDC driver using default configuration. */ - sdcStart(&PORTAB_SDC1, &sdccfg); + sdcStart(&PORTAB_SDC1, NULL); /* * Creates the blinker thread. diff --git a/testhal/AT32/multi/SDC/make/at-start-f415.make b/testhal/AT32/multi/SDC/make/at-start-f415.make index 8e280f39d9..a95d65d0d4 100644 --- a/testhal/AT32/multi/SDC/make/at-start-f415.make +++ b/testhal/AT32/multi/SDC/make/at-start-f415.make @@ -105,7 +105,7 @@ include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_at32f415.mk # HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/AT32F415/platform.mk include $(CHIBIOS_CONTRIB)/os/hal/boards/AT_START_F415/board.mk include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk diff --git a/testhal/AT32/multi/UART/.cproject b/testhal/AT32/multi/UART/.cproject index 74701160a0..2b0eb9925d 100644 --- a/testhal/AT32/multi/UART/.cproject +++ b/testhal/AT32/multi/UART/.cproject @@ -37,7 +37,7 @@ - + @@ -48,7 +48,7 @@ - + diff --git a/testhal/AT32/multi/UART/cfg/at-start-f415/config.h b/testhal/AT32/multi/UART/cfg/at-start-f415/config.h index 4fbd7cc3df..361e185d9c 100644 --- a/testhal/AT32/multi/UART/cfg/at-start-f415/config.h +++ b/testhal/AT32/multi/UART/cfg/at-start-f415/config.h @@ -1,5 +1,4 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio ChibiOS - Copyright (C) 2023..2024 HorrorTroll ChibiOS - Copyright (C) 2023..2024 Zhaqian @@ -16,6 +15,16 @@ limitations under the License. */ +/* + * CRC driver system settings. + */ +#define AT32_CRC_USE_CRC1 FALSE + +#define CRC_USE_DMA FALSE +#define AT32_CRC_CRC1_DMA_PRIORITY 2 +#define AT32_CRC_CRC1_IRQ_PRIORITY 5 +#define AT32_CRC_CRC1_DMA_STREAM AT32_DMA1_STREAM2 + /* * I2C fallback driver system settings. */ diff --git a/testhal/AT32/multi/UART/cfg/at-start-f415/halconf.h b/testhal/AT32/multi/UART/cfg/at-start-f415/halconf.h index 46b0bcae74..5b1de987e6 100644 --- a/testhal/AT32/multi/UART/cfg/at-start-f415/halconf.h +++ b/testhal/AT32/multi/UART/cfg/at-start-f415/halconf.h @@ -550,6 +550,8 @@ #define WSPI_USE_MUTUAL_EXCLUSION TRUE #endif +#include "halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/testhal/AT32/multi/UART/cfg/at-start-f415/halconf_community.h b/testhal/AT32/multi/UART/cfg/at-start-f415/halconf_community.h new file mode 100644 index 0000000000..c43d668764 --- /dev/null +++ b/testhal/AT32/multi/UART/cfg/at-start-f415/halconf_community.h @@ -0,0 +1,182 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the COMP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the OPAMP subsystem. + */ +#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__) +#define HAL_USE_OPAMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/AT32/multi/UART/cfg/at-start-f415/mcuconf.h b/testhal/AT32/multi/UART/cfg/at-start-f415/mcuconf.h index 9e311dd92f..f4f868865f 100644 --- a/testhal/AT32/multi/UART/cfg/at-start-f415/mcuconf.h +++ b/testhal/AT32/multi/UART/cfg/at-start-f415/mcuconf.h @@ -63,7 +63,7 @@ #define AT32_USBDIV AT32_USBDIV_DIV3 #define AT32_CLKOUT_SEL AT32_CLKOUT_SEL_NOCLOCK #define AT32_CLKOUTDIV AT32_CLKOUTDIV_DIV1 -#define AT32_ERTCSEL AT32_ERTCSEL_HEXTDIV +#define AT32_ERTCSEL AT32_ERTCSEL_NOCLOCK #define AT32_PVM_ENABLE FALSE #define AT32_PVMSEL AT32_PVMSEL_LEV1 @@ -136,10 +136,10 @@ #define AT32_I2C_USE_I2C1 FALSE #define AT32_I2C_USE_I2C2 FALSE #define AT32_I2C_BUSY_TIMEOUT 50 -#define AT32_I2C_I2C1_IRQ_PRIORITY 5 -#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_I2C1_DMA_PRIORITY 3 #define AT32_I2C_I2C2_DMA_PRIORITY 3 +#define AT32_I2C_I2C1_IRQ_PRIORITY 5 +#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* @@ -216,9 +216,13 @@ #define AT32_UART_USE_USART1 TRUE #define AT32_UART_USE_USART2 FALSE #define AT32_UART_USE_USART3 FALSE +#define AT32_UART_USE_UART4 FALSE +#define AT32_UART_USE_UART5 FALSE #define AT32_UART_USART1_DMA_PRIORITY 0 #define AT32_UART_USART2_DMA_PRIORITY 0 #define AT32_UART_USART3_DMA_PRIORITY 0 +#define AT32_UART_UART4_DMA_PRIORITY 0 +#define AT32_UART_UART5_DMA_PRIORITY 0 #define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* diff --git a/testhal/AT32/multi/UART/main.c b/testhal/AT32/multi/UART/main.c index 536b95a5c9..22299fe4ee 100644 --- a/testhal/AT32/multi/UART/main.c +++ b/testhal/AT32/multi/UART/main.c @@ -38,9 +38,15 @@ static void ledoff(virtual_timer_t *vtp, void *p) { (void)vtp; (void)p; +#if defined(AT32F415) palSetLine(PORTAB_BLINK_LED1); palSetLine(PORTAB_BLINK_LED2); palSetLine(PORTAB_BLINK_LED3); +#else + palClearLine(PORTAB_BLINK_LED1); + palClearLine(PORTAB_BLINK_LED2); + palClearLine(PORTAB_BLINK_LED3); +#endif } /* @@ -51,9 +57,15 @@ void txend1(UARTDriver *uartp) { (void)uartp; +#if defined(AT32F415) palClearLine(PORTAB_BLINK_LED1); palClearLine(PORTAB_BLINK_LED2); palClearLine(PORTAB_BLINK_LED3); +#else + palSetLine(PORTAB_BLINK_LED1); + palSetLine(PORTAB_BLINK_LED2); + palSetLine(PORTAB_BLINK_LED3); +#endif } /* @@ -63,10 +75,15 @@ void txend2(UARTDriver *uartp) { (void)uartp; +#if defined(AT32F415) palSetLine(PORTAB_BLINK_LED1); palSetLine(PORTAB_BLINK_LED2); palSetLine(PORTAB_BLINK_LED3); - +#else + palClearLine(PORTAB_BLINK_LED1); + palClearLine(PORTAB_BLINK_LED2); + palClearLine(PORTAB_BLINK_LED3); +#endif chSysLockFromISR(); chVTSetI(&vt1, TIME_MS2I(5000), restart, NULL); chSysUnlockFromISR(); @@ -92,9 +109,15 @@ void rxchar(UARTDriver *uartp, uint16_t c) { (void)c; /* Flashing the LED each time a character is received.*/ +#if defined(AT32F415) palClearLine(PORTAB_BLINK_LED1); palClearLine(PORTAB_BLINK_LED2); palClearLine(PORTAB_BLINK_LED3); +#else + palSetLine(PORTAB_BLINK_LED1); + palSetLine(PORTAB_BLINK_LED2); + palSetLine(PORTAB_BLINK_LED3); +#endif chSysLockFromISR(); chVTSetI(&vt2, TIME_MS2I(200), ledoff, NULL); diff --git a/testhal/AT32/multi/UART/make/at-start-f415.make b/testhal/AT32/multi/UART/make/at-start-f415.make index c52af3650d..ae14ade555 100644 --- a/testhal/AT32/multi/UART/make/at-start-f415.make +++ b/testhal/AT32/multi/UART/make/at-start-f415.make @@ -105,7 +105,7 @@ include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_at32f415.mk # HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/AT32F415/platform.mk include $(CHIBIOS_CONTRIB)/os/hal/boards/AT_START_F415/board.mk include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk diff --git a/testhal/AT32/multi/USB_CDC/.cproject b/testhal/AT32/multi/USB_CDC/.cproject index 74701160a0..802eda1acf 100644 --- a/testhal/AT32/multi/USB_CDC/.cproject +++ b/testhal/AT32/multi/USB_CDC/.cproject @@ -37,7 +37,7 @@ - + @@ -48,7 +48,7 @@ - + diff --git a/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/config.h b/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/config.h index 4fbd7cc3df..361e185d9c 100644 --- a/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/config.h +++ b/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/config.h @@ -1,5 +1,4 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio ChibiOS - Copyright (C) 2023..2024 HorrorTroll ChibiOS - Copyright (C) 2023..2024 Zhaqian @@ -16,6 +15,16 @@ limitations under the License. */ +/* + * CRC driver system settings. + */ +#define AT32_CRC_USE_CRC1 FALSE + +#define CRC_USE_DMA FALSE +#define AT32_CRC_CRC1_DMA_PRIORITY 2 +#define AT32_CRC_CRC1_IRQ_PRIORITY 5 +#define AT32_CRC_CRC1_DMA_STREAM AT32_DMA1_STREAM2 + /* * I2C fallback driver system settings. */ diff --git a/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/halconf.h b/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/halconf.h index 54dcee0877..256f1434f1 100644 --- a/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/halconf.h +++ b/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/halconf.h @@ -550,6 +550,8 @@ #define WSPI_USE_MUTUAL_EXCLUSION TRUE #endif +#include "halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/halconf_community.h b/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/halconf_community.h new file mode 100644 index 0000000000..c43d668764 --- /dev/null +++ b/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/halconf_community.h @@ -0,0 +1,182 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the COMP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the OPAMP subsystem. + */ +#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__) +#define HAL_USE_OPAMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/mcuconf.h b/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/mcuconf.h index a827f2815f..cc858c5a79 100644 --- a/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/mcuconf.h +++ b/testhal/AT32/multi/USB_CDC/cfg/at-start-f415/mcuconf.h @@ -63,7 +63,7 @@ #define AT32_USBDIV AT32_USBDIV_DIV3 #define AT32_CLKOUT_SEL AT32_CLKOUT_SEL_NOCLOCK #define AT32_CLKOUTDIV AT32_CLKOUTDIV_DIV1 -#define AT32_ERTCSEL AT32_ERTCSEL_HEXTDIV +#define AT32_ERTCSEL AT32_ERTCSEL_NOCLOCK #define AT32_PVM_ENABLE FALSE #define AT32_PVMSEL AT32_PVMSEL_LEV1 @@ -136,10 +136,10 @@ #define AT32_I2C_USE_I2C1 FALSE #define AT32_I2C_USE_I2C2 FALSE #define AT32_I2C_BUSY_TIMEOUT 50 -#define AT32_I2C_I2C1_IRQ_PRIORITY 5 -#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_I2C1_DMA_PRIORITY 3 #define AT32_I2C_I2C2_DMA_PRIORITY 3 +#define AT32_I2C_I2C1_IRQ_PRIORITY 5 +#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* @@ -216,9 +216,13 @@ #define AT32_UART_USE_USART1 FALSE #define AT32_UART_USE_USART2 FALSE #define AT32_UART_USE_USART3 FALSE +#define AT32_UART_USE_UART4 FALSE +#define AT32_UART_USE_UART5 FALSE #define AT32_UART_USART1_DMA_PRIORITY 0 #define AT32_UART_USART2_DMA_PRIORITY 0 #define AT32_UART_USART3_DMA_PRIORITY 0 +#define AT32_UART_UART4_DMA_PRIORITY 0 +#define AT32_UART_UART5_DMA_PRIORITY 0 #define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* diff --git a/testhal/AT32/multi/USB_CDC/main.c b/testhal/AT32/multi/USB_CDC/main.c index 66a444c978..71eacb8799 100644 --- a/testhal/AT32/multi/USB_CDC/main.c +++ b/testhal/AT32/multi/USB_CDC/main.c @@ -100,17 +100,11 @@ static THD_FUNCTION(Thread1, arg) { systime_t time; time = serusbcfg.usbp->state == USB_ACTIVE ? 250 : 500; - palSetLine(PORTAB_BLINK_LED1); + palToggleLine(PORTAB_BLINK_LED1); chThdSleepMilliseconds(time); - palSetLine(PORTAB_BLINK_LED2); + palToggleLine(PORTAB_BLINK_LED2); chThdSleepMilliseconds(time); - palSetLine(PORTAB_BLINK_LED3); - chThdSleepMilliseconds(time); - palClearLine(PORTAB_BLINK_LED1); - chThdSleepMilliseconds(time); - palClearLine(PORTAB_BLINK_LED2); - chThdSleepMilliseconds(time); - palClearLine(PORTAB_BLINK_LED3); + palToggleLine(PORTAB_BLINK_LED3); chThdSleepMilliseconds(time); } } diff --git a/testhal/AT32/multi/USB_CDC/make/at-start-f415.make b/testhal/AT32/multi/USB_CDC/make/at-start-f415.make index 8e280f39d9..a95d65d0d4 100644 --- a/testhal/AT32/multi/USB_CDC/make/at-start-f415.make +++ b/testhal/AT32/multi/USB_CDC/make/at-start-f415.make @@ -105,7 +105,7 @@ include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_at32f415.mk # HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/AT32F415/platform.mk include $(CHIBIOS_CONTRIB)/os/hal/boards/AT_START_F415/board.mk include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk diff --git a/testhal/AT32/multi/WDT/.cproject b/testhal/AT32/multi/WDT/.cproject index 74701160a0..5f4424d293 100644 --- a/testhal/AT32/multi/WDT/.cproject +++ b/testhal/AT32/multi/WDT/.cproject @@ -37,7 +37,7 @@ - + @@ -48,7 +48,7 @@ - + diff --git a/testhal/AT32/multi/WDT/cfg/at-start-f415/config.h b/testhal/AT32/multi/WDT/cfg/at-start-f415/config.h index 4fbd7cc3df..361e185d9c 100644 --- a/testhal/AT32/multi/WDT/cfg/at-start-f415/config.h +++ b/testhal/AT32/multi/WDT/cfg/at-start-f415/config.h @@ -1,5 +1,4 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio ChibiOS - Copyright (C) 2023..2024 HorrorTroll ChibiOS - Copyright (C) 2023..2024 Zhaqian @@ -16,6 +15,16 @@ limitations under the License. */ +/* + * CRC driver system settings. + */ +#define AT32_CRC_USE_CRC1 FALSE + +#define CRC_USE_DMA FALSE +#define AT32_CRC_CRC1_DMA_PRIORITY 2 +#define AT32_CRC_CRC1_IRQ_PRIORITY 5 +#define AT32_CRC_CRC1_DMA_STREAM AT32_DMA1_STREAM2 + /* * I2C fallback driver system settings. */ diff --git a/testhal/AT32/multi/WDT/cfg/at-start-f415/halconf.h b/testhal/AT32/multi/WDT/cfg/at-start-f415/halconf.h index bb02d4b607..f239389a49 100644 --- a/testhal/AT32/multi/WDT/cfg/at-start-f415/halconf.h +++ b/testhal/AT32/multi/WDT/cfg/at-start-f415/halconf.h @@ -550,6 +550,8 @@ #define WSPI_USE_MUTUAL_EXCLUSION TRUE #endif +#include "halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/testhal/AT32/multi/WDT/cfg/at-start-f415/halconf_community.h b/testhal/AT32/multi/WDT/cfg/at-start-f415/halconf_community.h new file mode 100644 index 0000000000..c43d668764 --- /dev/null +++ b/testhal/AT32/multi/WDT/cfg/at-start-f415/halconf_community.h @@ -0,0 +1,182 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS - Copyright (C) 2023..2024 HorrorTroll + ChibiOS - Copyright (C) 2023..2024 Zhaqian + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the COMP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the OPAMP subsystem. + */ +#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__) +#define HAL_USE_OPAMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/AT32/multi/WDT/cfg/at-start-f415/mcuconf.h b/testhal/AT32/multi/WDT/cfg/at-start-f415/mcuconf.h index ce6f302b38..7f0e93996b 100644 --- a/testhal/AT32/multi/WDT/cfg/at-start-f415/mcuconf.h +++ b/testhal/AT32/multi/WDT/cfg/at-start-f415/mcuconf.h @@ -63,7 +63,7 @@ #define AT32_USBDIV AT32_USBDIV_DIV3 #define AT32_CLKOUT_SEL AT32_CLKOUT_SEL_NOCLOCK #define AT32_CLKOUTDIV AT32_CLKOUTDIV_DIV1 -#define AT32_ERTCSEL AT32_ERTCSEL_HEXTDIV +#define AT32_ERTCSEL AT32_ERTCSEL_LICK #define AT32_PVM_ENABLE FALSE #define AT32_PVMSEL AT32_PVMSEL_LEV1 @@ -136,10 +136,10 @@ #define AT32_I2C_USE_I2C1 FALSE #define AT32_I2C_USE_I2C2 FALSE #define AT32_I2C_BUSY_TIMEOUT 50 -#define AT32_I2C_I2C1_IRQ_PRIORITY 5 -#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_I2C1_DMA_PRIORITY 3 #define AT32_I2C_I2C2_DMA_PRIORITY 3 +#define AT32_I2C_I2C1_IRQ_PRIORITY 5 +#define AT32_I2C_I2C2_IRQ_PRIORITY 5 #define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* @@ -216,9 +216,13 @@ #define AT32_UART_USE_USART1 FALSE #define AT32_UART_USE_USART2 FALSE #define AT32_UART_USE_USART3 FALSE +#define AT32_UART_USE_UART4 FALSE +#define AT32_UART_USE_UART5 FALSE #define AT32_UART_USART1_DMA_PRIORITY 0 #define AT32_UART_USART2_DMA_PRIORITY 0 #define AT32_UART_USART3_DMA_PRIORITY 0 +#define AT32_UART_UART4_DMA_PRIORITY 0 +#define AT32_UART_UART5_DMA_PRIORITY 0 #define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* diff --git a/testhal/AT32/multi/WDT/make/at-start-f415.make b/testhal/AT32/multi/WDT/make/at-start-f415.make index c52af3650d..ae14ade555 100644 --- a/testhal/AT32/multi/WDT/make/at-start-f415.make +++ b/testhal/AT32/multi/WDT/make/at-start-f415.make @@ -105,7 +105,7 @@ include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_at32f415.mk # HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/AT32F415/platform.mk include $(CHIBIOS_CONTRIB)/os/hal/boards/AT_START_F415/board.mk include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk