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Remove old comment no longer valid
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amaranth_orchard/memory/spimemio.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -81,7 +81,7 @@ def elaborate(self, platform):
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"i_resetn": ~ResetSignal(),
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"i_valid": self.data_bus.cyc & self.data_bus.stb,
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"o_ready": spi_ready,
84-
"i_addr": Cat(Const(0, 2), self.data_bus.adr), # Hack to force a 1MB offset
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"i_addr": Cat(Const(0, 2), self.data_bus.adr),
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"o_rdata": self.data_bus.dat_r,
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"o_flash_csb": self.pins.csn.o,
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"o_flash_clk": self.pins.clk.o,

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