removed trailing whitespace

Author: mooperd

chipflow_lib/steps/silicon.py

@@ -93,7 +93,7 @@ def run_cli(self, args):
 
         rtlil_path = self.prepare()  # always prepare before submission
         if args.action == "submit":
-            self.submit(rtlil_path, dry_run=args.dry_run, wait=args.wait) 
+            self.submit(rtlil_path, dry_run=args.dry_run, wait=args.wait)
 
     def prepare(self):
         """Elaborate the design and convert it to RTLIL.