feat: rename source/drain to power/ground

Author: robtaylor

chipflow_lib/__init__.py

@@ -107,7 +107,7 @@ def _ensure_chipflow_root():
                     "additionalProperties": False,
                     "properties": {
                         "type": {
-                            "enum": ["io", "i", "o", "oe", "clock", "reset", "source", "drain"]
+                            "enum": ["io", "i", "o", "oe", "clock", "reset", "power", "ground"]
                         },
                         "loc": {
                             "type": "string",

chipflow_lib/platforms/utils.py

@@ -315,9 +315,9 @@ def check_pad(self, name: str, defn: dict):
                 return self.clocks[name] if name in self.clocks else None
             case {"type": "reset"}:
                 return self.resets[name] if name in self.clocks else None
-            case {"type": "source"}:
+            case {"type": "power"}:
                 return self.power[name] if name in self.power else None
-            case {"type": "drain"}:
+            case {"type": "ground"}:
                 return self.power[name] if name in self.power else None
             case _:
                 return None
@@ -328,10 +328,10 @@ def add_pad(self, name: str, defn: dict):
                 self.clocks[name] = Port(type="clock", pins=[loc], direction=io.Direction.Input)
             case {"type": "reset", "loc": loc}:
                 self.resets[name] = Port(type="reset", pins=[loc], direction=io.Direction.Input)
-            case {"type": "source", "loc": loc}:
-                self.power[name] = Port(type="source", pins=[loc])
-            case {"type": "drain", "loc": loc}:
-                self.power[name] = Port(type="drain", pins=[loc])
+            case {"type": "power", "loc": loc}:
+                self.power[name] = Port(type="power", pins=[loc])
+            case {"type": "ground", "loc": loc}:
+                self.power[name] = Port(type="ground", pins=[loc])
             case _:
                 pass
 

docs/example-chipflow.toml

@@ -23,21 +23,21 @@ sys_clk   = { type = "clock", loc = "114" }
 sys_rst_n = { type = "reset", loc = "115" }
 
 [chipflow.silicon.power]
-dvss0        = { type = "source", loc =   "1" }
-dvdd0        = { type = "drain", loc =   "9" }
-vss0         = { type = "source", loc =  "17" }
-vdd0         = { type = "drain", loc =  "25" }
-dvss1        = { type = "source", loc =  "33" }
-dvdd1        = { type = "drain", loc =  "41" }
-vss1         = { type = "source", loc =  "49" }
-vdd1         = { type = "drain", loc =  "57" }
-dvss2        = { type = "source", loc =  "65" }
-dvdd2        = { type = "drain", loc =  "73" }
-vss2         = { type = "source", loc =  "81" }
-vdd2         = { type = "drain", loc =  "89" }
-dvss3        = { type = "source", loc =  "97" }
-dvdd3        = { type = "drain", loc = "105" }
-vss3         = { type = "source", loc = "113" }
-vdd3         = { type = "drain", loc = "121" }
-dvss4        = { type = "source", loc = "129" }
-dvdd4        = { type = "drain", loc = "137" }
+dvss0        = { type = "power", loc =   "1" }
+dvdd0        = { type = "ground", loc =   "9" }
+vss0         = { type = "power", loc =  "17" }
+vdd0         = { type = "ground", loc =  "25" }
+dvss1        = { type = "power", loc =  "33" }
+dvdd1        = { type = "ground", loc =  "41" }
+vss1         = { type = "power", loc =  "49" }
+vdd1         = { type = "ground", loc =  "57" }
+dvss2        = { type = "power", loc =  "65" }
+dvdd2        = { type = "ground", loc =  "73" }
+vss2         = { type = "power", loc =  "81" }
+vdd2         = { type = "ground", loc =  "89" }
+dvss3        = { type = "power", loc =  "97" }
+dvdd3        = { type = "ground", loc = "105" }
+vss3         = { type = "power", loc = "113" }
+vdd3         = { type = "ground", loc = "121" }
+dvss4        = { type = "power", loc = "129" }
+dvdd4        = { type = "ground", loc = "137" }