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Fix lint errors: remove unused imports
Removed unused imports from: - packaging/allocation.py - packaging/grid_array.py - packaging/port_desc.py - platforms/_utils.py - utils.py - tests/test_init.py All ruff checks passing. 🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude <[email protected]>
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6 files changed

+9
-31
lines changed

6 files changed

+9
-31
lines changed

chipflow_lib/packaging/allocation.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,14 +10,14 @@
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import logging
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from collections import OrderedDict, deque
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from pprint import pformat
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from typing import Any, Dict, List, Set, Tuple, Optional
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from typing import Any, Dict, List, Tuple, Optional
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from amaranth.lib import io
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from .. import ChipFlowError
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from ..io.signatures import IO_ANNOTATION_SCHEMA, IOModel
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from .pins import PinList
20-
from .port_desc import PortDesc, PortMap, Interface
20+
from .port_desc import PortDesc, PortMap
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from .lockfile import LockFile
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logger = logging.getLogger(__name__)

chipflow_lib/packaging/grid_array.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@
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from .base import BasePackageDef
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from .pins import PowerPins, JTAGPins, BringupPins
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from .lockfile import Package, LockFile
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from .lockfile import LockFile
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from .allocation import _linear_allocate_components
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if TYPE_CHECKING:

chipflow_lib/packaging/port_desc.py

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,6 @@
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from typing import Dict, Generic, List
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import pydantic
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from amaranth.lib import io
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from ..io.signatures import IOModel
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from .pins import Pin

chipflow_lib/platforms/_utils.py

Lines changed: 6 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1,20 +1,13 @@
1-
import abc
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import itertools
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import logging
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import pathlib
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import pydantic
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7-
from collections import OrderedDict, deque, defaultdict
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from collections.abc import Iterable
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from pprint import pformat
10-
from typing import Set, List, Dict, Optional, Union, Literal, Tuple, TypeVar
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from typing import Dict, Tuple
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12-
from dataclasses import dataclass, asdict
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from enum import IntEnum, StrEnum, auto
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from math import ceil, floor
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from enum import StrEnum, auto
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from typing import (
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Any, Annotated, NamedTuple, Generic, Self,
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TYPE_CHECKING
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Annotated, TYPE_CHECKING
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)
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from typing_extensions import (
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TypedDict, Unpack, NotRequired
@@ -28,26 +21,14 @@
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)
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from .. import ChipFlowError, _ensure_chipflow_root, _get_cls_by_reference
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from .. import ChipFlowError, _get_cls_by_reference
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from ._annotate import amaranth_annotate
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from ._sky130 import Sky130DriveMode
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from ..config_models import Config, Process, Voltage, VoltageRange
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from ..config_models import Config
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# Import packaging functionality from new module
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from ..packaging import (
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Pin, PinSet, PinList, Pins,
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PowerType, JTAGWire, PortType,
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PowerPins, JTAGPins, BringupPins,
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PortDesc, Interface, Component, PortMap,
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PackageDef, Package, LockFile,
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BasePackageDef, LinearAllocPackageDef,
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BareDiePackageDef, QuadPackageDef,
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GAPin, GALayout, GAPackageDef,
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OFPin, OpenframePackageDef,
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UnableToAllocate,
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_count_member_pins, _allocate_pins, _linear_allocate_components,
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_find_contiguous_sequence, _group_consecutive_items,
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load_pinlock,
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JTAGWire,
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)
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if TYPE_CHECKING:

chipflow_lib/utils.py

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,6 @@ def top_components(config: 'Config') -> Dict[str, 'wiring.Component']:
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Raises:
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ChipFlowError: If component references are invalid or instantiation fails
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"""
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from amaranth.lib import wiring
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from pprint import pformat
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component_configs = {}

tests/test_init.py

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -132,7 +132,6 @@ def test_parse_config(self, mock_parse_config_file, mock_ensure_chipflow_root):
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self.assertTrue(mock_parse_config_file.called)
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# Accept either string or Path object
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called_path = mock_parse_config_file.call_args[0][0]
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expected_path = str(mock_ensure_chipflow_root.return_value / "chipflow.toml")
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actual_path = called_path.as_posix() if hasattr(called_path, 'as_posix') else str(called_path)
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self.assertIn("chipflow.toml", actual_path)
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self.assertEqual(config.chipflow.project_name, "test")

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