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Add direction accessor for IOModel and export the right api
1 parent 1a2f7e9 commit 74bd48c

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2 files changed

+21
-8
lines changed

2 files changed

+21
-8
lines changed

chipflow_lib/platforms/__init__.py

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,11 @@
1010
from .sim import *
1111
from .utils import *
1212

13-
__all__ = ['IO_ANNOTATION_SCHEMA', 'IOSignature',
13+
__all__ = ['IO_ANNOTATION_SCHEMA', 'IOSignature', 'IOModel',
1414
'OutputIOSignature', 'InputIOSignature', 'BidirIOSignature',
15-
'load_pinlock', "PACKAGE_DEFINITIONS", 'top_components']
15+
'load_pinlock', "PACKAGE_DEFINITIONS", 'top_components', 'LockFile',
16+
'Package', 'PortMap', 'Port', 'Process',
17+
'GAPackageDef', 'QuadPackageDef', 'BareDiePackageDef', 'BasePackageDef',
18+
'BringupPins', 'JTAGPins', 'PowerPins',
19+
'SiliconPlatformPort', 'SiliconPlatform',
20+
'SimPlatform']

chipflow_lib/platforms/utils.py

Lines changed: 14 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@
2626
from amaranth.lib.wiring import In, Out
2727
from pydantic import (
2828
ConfigDict, TypeAdapter, PlainSerializer,
29-
WithJsonSchema, with_config
29+
WithJsonSchema
3030
)
3131

3232

@@ -35,11 +35,12 @@
3535
if TYPE_CHECKING:
3636
from ..config_models import Config
3737

38-
__all__ = ['IO_ANNOTATION_SCHEMA', 'IOSignature',
38+
__all__ = ['IO_ANNOTATION_SCHEMA', 'IOSignature', 'IOModel',
3939
'OutputIOSignature', 'InputIOSignature', 'BidirIOSignature',
4040
'load_pinlock', "PACKAGE_DEFINITIONS", 'top_components', 'LockFile',
41-
'Package', 'PortMap', 'Port',
42-
'GAPackageDef', 'QuadPackageDef', 'BareDiePackageDef', 'BasePackageDef']
41+
'Package', 'PortMap', 'Port', 'Process',
42+
'GAPackageDef', 'QuadPackageDef', 'BareDiePackageDef', 'BasePackageDef',
43+
'BringupPins', 'JTAGPins', 'PowerPins']
4344

4445

4546
logger = logging.getLogger(__name__)
@@ -73,7 +74,7 @@ class VoltageRange:
7374
})
7475

7576

76-
@with_config(ConfigDict(arbitrary_types_allowed=True)) # type: ignore[reportCallIssue]
77+
@pydantic.with_config(ConfigDict(arbitrary_types_allowed=True)) # type: ignore[reportCallIssue]
7778
class _IOModelOptions(TypedDict):
7879
all_have_oe: NotRequired[bool]
7980
allocate_power: NotRequired[bool]
@@ -83,7 +84,7 @@ class _IOModelOptions(TypedDict):
8384
init: NotRequired[Annotated[Const, ConstSerializer, ConstSchema]]
8485

8586

86-
@with_config(ConfigDict(arbitrary_types_allowed=True)) # type: ignore[reportCallIssue]
87+
@pydantic.with_config(ConfigDict(arbitrary_types_allowed=True)) # type: ignore[reportCallIssue]
8788
class IOModel(_IOModelOptions):
8889
"""
8990
Options for IO Ports
@@ -305,6 +306,13 @@ def width(self):
305306
assert len(self.pins) == self.iomodel['width']
306307
return self.iomodel['width']
307308

309+
@property
310+
def direction(self):
311+
assert self.pins and 'direction' in self.iomodel
312+
assert len(self.pins) == self.iomodel['direction']
313+
return self.iomodel['direction']
314+
315+
308316

309317
def _group_consecutive_items(ordering: PinList, lst: PinList) -> OrderedDict[int, List[PinList]]:
310318
if not lst:

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