wip

Author: robtaylor

.coverage

@@ -119,22 +119,22 @@ def lock_pins() -> None:
             logger.debug(f"Interface {component}.{k}:")
             logger.debug(pformat(v))
             width = count_member_pins(k, v)
-            print(f"  {k}: total {width} pins")
+            logger.debug(f"  {k}: total {width} pins")
             old_ports = oldlock.port_map.get_ports(component, k) if oldlock else None
             if old_ports:
-                print(f"  {component}.{k} found in pins.lock, reusing")
-                logger.debug(pformat(port))
-                old_width = sum([len(p) for p in old_ports])
+                logger.debug(f"  {component}.{k} found in pins.lock, reusing")
+                logger.debug(pformat(old_ports))
+                old_width = sum([len(p.pins) for p in old_ports.values()])
                 if old_width != width:
                     raise ChipFlowError(
                         f"top level interface has changed size. "
                         f"Old size = {old_width}, new size = {width}"
                     )
-                port_map.add_ports(old_ports)
+                port_map.add_ports(component, k, old_ports)
             else:
                 pins = package_type.allocate(unallocated, width)
                 if len(pins) == 0:
-                    raise ChipFlowError("ERROR: No pins were allocated by {package}")
+                    raise ChipFlowError("No pins were allocated by {package}")
                 logger.debug(f"allocated range: {pins}")
                 unallocated = unallocated - set(pins)
                 _map, _ = allocate_pins(k, v, pins)

chipflow_lib/pin_lock.py

@@ -30,7 +30,7 @@ def _chipflow_schema_uri(name: str, version: int) -> str:
 
 
 class _PinAnnotationModel(BaseModel):
-    model_config = ConfigDict(use_enum_values=True, export_values=True)
+    model_config = ConfigDict(use_enum_values=True)
     direction: io.Direction
     width: int
 
@@ -57,9 +57,7 @@ def origin(self):  # type: ignore
         return self.model
 
     def as_json(self):  # type: ignore
-        json_dict = self.model.model_dump()
-        json_dict["direction"] = self.model.direction.name  # Use .name to get short enum name
-        return json_dict
+        return self.model.model_dump()
 
 
 PIN_ANNOTATION_SCHEMA = str(_chipflow_schema_uri("pin-annotation", 0))
@@ -87,7 +85,9 @@ def __init__(self, direction, width=1, init=None):
         super().__init__(sig)
 
     def annotations(self, *args):
-        return wiring.Signature.annotations(self, *args) + (_PinAnnotation(direction=self._direction, width=self._width),)
+        annotations = wiring.Signature.annotations(self, *args)
+        pin_annotation = _PinAnnotation(direction=self._direction, width=self._width)
+        return annotations + (pin_annotation,)
 
     def __repr__(self):
         return f"PinSignature({self._direction}, {self._width})"
@@ -105,8 +105,9 @@ def BidirPinSignature(width, **kwargs):
     return PinSignature(io.Direction.Bidir, width=width, **kwargs)
 
 
-PinSet = Set[tuple]
-PinList = List[tuple]
+Pin = Union[tuple, str]
+PinSet = Set[Pin]
+PinList = List[Pin]
 Pins = Union[PinSet, PinList]
 
 
@@ -128,15 +129,17 @@ def _group_consecutive_items(ordering: PinList, lst: PinList) -> OrderedDict[int
     last = lst[0]
     current_group = [last]
 
+    logger.debug(f"_group_consecutive_items starting with {current_group}")
+
     for item in lst[1:]:
         idx = ordering.index(last)
         next = ordering[idx + 1] if idx < len(ordering) - 1 else None
-        # logger.debug(f"inspecting {item}, index {idx}, next {next}")
+        logger.debug(f"inspecting {item}, index {idx}, next {next}")
         if item == next:
             current_group.append(item)
-            # logger.debug("found consecutive, adding to current group")
+            logger.debug("found consecutive, adding to current group")
         else:
-            # logger.debug("found nonconsecutive, creating new group")
+            logger.debug("found nonconsecutive, creating new group")
             grouped.append(current_group)
             current_group = [item]
         last = item
@@ -212,7 +215,7 @@ def sortpins(self, pins: Pins) -> PinList:
         return list(pins).sort()
 
 
-class _QuadPackageDef(_BasePackageDef):
+class _BareDiePackageDef(_BasePackageDef):
     """Definition of a package with pins on four sides, labelled north, south, east, west
     with an integer identifier within each side.
     """
@@ -223,22 +226,26 @@ class _QuadPackageDef(_BasePackageDef):
     width: int
     height: int
 
+    def model_post_init(self, __context):
+        self._ordered_pins = sorted(
+            list(itertools.product((_Side.N, _Side.S), range(self.width))) +
+            list(itertools.product((_Side.W, _Side.E), range(self.height))))
+        return super().model_post_init(__context)
+
     @property
     def pins(self) -> PinSet:
-        return set(
-            itertools.product((_Side.N, _Side.S), range(self.width)) +
-            itertools.product((_Side.W, _Side.E), range(self.height)))
+        return set(self._ordered_pins)
 
     def allocate(self, available: PinSet, width: int) -> PinList:
         avail_n = self.sortpins(available)
-        logger.debug(f"QuadPackageDef.allocate {width} from {len(avail_n)} remaining")
-        ret = _find_contiguous_sequence(avail_n, width)
-        logger.debug(f"QuadPackageDef.returned {ret}")
+        logger.debug(f"_BareDiePackageDef.allocate {width} from {len(avail_n)} remaining")
+        ret = _find_contiguous_sequence(self._ordered_pins, avail_n, width)
+        logger.debug(f"_BareDiePackageDef.returned {ret}")
         assert len(ret) == width
         return ret
 
 
-class _PGAPackageDef(_BasePackageDef):
+class _QuadPackageDef(_BasePackageDef):
     """Definiton of a PGA package with `size` pins
 
     This is package with `size` pins, numbered, with the assumption that adjacent pins
@@ -248,31 +255,38 @@ class _PGAPackageDef(_BasePackageDef):
     # Used by pydantic to differentate when deserialising
     type: Literal["_PGAPackageDef"] = "_PGAPackageDef"
 
-    size: int
+    width:int
+    height: int
+
+    def model_post_init(self, __context):
+        self._ordered_pins = sorted(
+            [str(i) for i in range(1, self.width * 2 + self.height * 2)])
+        return super().model_post_init(__context)
+
 
     @property
-    def pins(self) -> Set[str]:
-        return set([str(i) for i in range(self.size - 1)])
+    def pins(self) -> PinSet:
+        return set(self._ordered_pins)
 
     def allocate(self, available: Set[str], width: int) -> List[str]:
-        avail_n = sorted([int(i) for i in available])
-        logger.debug(f"PGAPackageDef.allocate {width} from {len(avail_n)} remaining")
-        ret = _find_contiguous_sequence(avail_n, width)
-        logger.debug(f"PGAPackageDef.returned {ret}")
+        avail_n = sorted(available)
+        logger.debug(f"QuadPackageDef.allocate {width} from {len(avail_n)} remaining: {available}")
+        ret = _find_contiguous_sequence(self._ordered_pins, avail_n, width)
+        logger.debug(f"QuadPackageDef.returned {ret}")
         assert len(ret) == width
-        return [str(i) for i in ret]
+        return ret
 
     def sortpins(self, pins: Union[List[str], Set[str]]) -> List[str]:
         return sorted(list(pins), key=int)
 
 
 # Add any new package types to both PACKAGE_DEFINITIONS and the PackageDef union
 PACKAGE_DEFINITIONS = {
-    "pga144": _PGAPackageDef(name="pga144", size=144),
-    "cf20": _QuadPackageDef(name="cf20", width=7, height=3)
+    "pga144": _QuadPackageDef(name="pga144", width=36, height=36),
+    "cf20": _BareDiePackageDef(name="cf20", width=7, height=3)
 }
 
-PackageDef = Union[_PGAPackageDef, _BasePackageDef]
+PackageDef = Union[_QuadPackageDef, _BasePackageDef]
 
 
 class Port(pydantic.BaseModel):

chipflow_lib/platforms/utils.py

@@ -2,9 +2,6 @@
 
 # Project metadata
 
-[tool.pdm.version]
-source = "scm"
-
 [project]
 name = "chipflow-lib"
 dynamic = ["version"]
@@ -43,21 +40,6 @@ build-backend = "pdm.backend"
 
 # Development workflow configuration
 
-[tool.pdm.dev-dependencies]
-test = [
-    "pytest>=7.2.0",
-    "sphinx>=7.1.2",
-]
-lint = [
-    "ruff",
-]
-
-[tool.pdm.scripts]
-test.cmd = "pytest"
-test-docs.cmd = "sphinx-build -b doctest docs/ docs/_build"
-lint.cmd = "ruff check"
-document.cmd = "sphinx-build docs/ docs/_build/ -W --keep-going"
-
 [tool.pyright]
 diagnosticMode=false
 typeCheckingMode = "off"
@@ -70,3 +52,25 @@ include = ["pyproject.toml", "**/*.py", "chipflow.toml"]
 
 [tool.ruff.lint]
 ignore = ['F403', 'F405']
+
+[tool.pdm.version]
+source = "scm"
+
+[tool.pdm.scripts]
+test-cov.cmd = "pytest --cov=chipflow_lib --cov-report=html"
+test.cmd = "pytest"
+test-docs.cmd = "sphinx-build -b doctest docs/ docs/_build"
+lint.cmd = "ruff check"
+document.cmd = "sphinx-build docs/ docs/_build/ -W --keep-going"
+
+
+[dependency-groups]
+lint = [
+    "ruff",
+    "pytest-cov",
+]
+test = [
+    "pytest>=7.2.0",
+    "sphinx>=7.1.2",
+    "pytest-cov>=6.0.0",
+]

pyproject.toml

@@ -100,18 +100,5 @@ def test_pin_annotation_as_json():
     json_output = annotation.as_json()
     print(f"json_output: {json_output}") # Debug print using print()
     assert isinstance(json_output, dict)
-    assert json_output["direction"] == "b"
-    assert json_output["width"] == 8
-
-def test_pin_annotation_in_interface():
-    
-    interface_signature = wiring.Signature([ # Define signature as a list of members directly
-        wiring.Out(PinSignature(io.Direction.Output, width=32)) # List of wiring.Member instances, removed name="p1"
-    ])
-
-    iface = wiring.PureInterface(signature=interface_signature) # Create anonymous PureInterface instance
-    assert hasattr(iface.p1, "metadata") # Uncomment assertions to use iface.p1
-    assert isinstance(iface.p1.metadata, meta.Metadata)
-    assert isinstance(iface.p1.metadata.annotation_value, _PinAnnotation)
-    assert iface.p1.metadata.annotation_value.model.direction is io.Direction.Output
-    assert iface.p1.metadata.annotation_value.model.width == 32
+    assert json_output["direction"] == "io"
+    assert json_output["width"] == 8