wip

Author: robtaylor

chipflow_lib/platforms/sim.py

@@ -5,13 +5,13 @@
 from pathlib import Path
 
 from amaranth import *
-from amaranth.lib import wiring, io
+from amaranth.lib import io
 from amaranth.back import rtlil
 from amaranth.hdl._ir import PortDirection
+from amaranth.lib.cdc import FFSynchronizer
 
 from .. import ChipFlowError
-from .silicon import SiliconPlatformPort, FFSynchronizer
-from .utils import load_pinlock, Port
+from .utils import load_pinlock
 
 __all__ = ["SimPlatform"]
 

chipflow_lib/steps/sim.py

@@ -11,14 +11,11 @@
 from doit.task import dict_to_task
 
 from amaranth import *
-from amaranth.lib import wiring, io
-from amaranth.lib.cdc import FFSynchronizer
-from amaranth.back import rtlil
 
 from .. import ChipFlowError, _ensure_chipflow_root
 from . import StepBase
-from ..platforms import SimPlatform, top_interfaces, load_pinlock
-from ..platforms.utils import IOSignature, load_pinlock, Port
+from ..platforms import SimPlatform, top_interfaces
+from ..platforms.utils import IOSignature
 from ..platforms.sim import VARIABLES, TASKS, DOIT_CONFIG