removing clk divider test

Author: johnymil-chipflow

pyuvm_verif/testbench_spi.py

@@ -355,9 +355,9 @@ def build_phase(self):
         uvm_factory().set_type_override_by_type(TestSeq, TestRdSeq)
         super().build_phase()
 
-@pyuvm.test()
+"""@pyuvm.test()
 class ClkdividerTest(BasicTest):
 
     def build_phase(self):
         uvm_factory().set_type_override_by_type(TestSeq, TestClkdivSeq)
-        super().build_phase()
+        super().build_phase()"""