mfd: cs48l32: ADC oscillation workaround

Add registers needed for ADC oscillation workaround.

Change-Id: Ia0693cb73c3c78ef0863559f61b7aef9fd86f748
Signed-off-by: Qi Zhou <[email protected]>

Author: qi-cirrus

drivers/mfd/cs48l32-tables.c

@@ -98,6 +98,8 @@ static const struct reg_default cs48l32_reg_default[] = {
 	{ 0x00004304, 0x00000000 }, /* AUXPDM_CONTROL2 */
 	{ 0x00004308, 0x00010008 }, /* AUXPDM1_CONTROL1 */
 	{ 0x00004310, 0x00010008 }, /* AUXPDM2_CONTROL1 */
+	{ 0x00004688, 0x00000000 }, /* ADC1L_ANA_CONTROL1 */
+	{ 0x0000468c, 0x00000000 }, /* ADC1R_ANA_CONTROL1 */
 	{ 0x000046a0, 0x00000300 }, /* ADC1L_LP_CONTROL1 */
 	{ 0x000046a4, 0x00000300 }, /* ADC1R_LP_CONTROL1 */
 	{ 0x00006000, 0x00000000 }, /* ASP1_ENABLES1 */
@@ -511,6 +513,8 @@ static bool cs48l32_readable_register(struct device *dev, unsigned int reg)
 	case TACNA_AUXPDM_CONTROL2:
 	case TACNA_AUXPDM1_CONTROL1:
 	case TACNA_AUXPDM2_CONTROL1:
+	case TACNA_ADC1L_ANA_CONTROL1:
+	case TACNA_ADC1R_ANA_CONTROL1:
 	case TACNA_ADC1L_LP_CONTROL1:
 	case TACNA_ADC1R_LP_CONTROL1:
 	case TACNA_ASP1_ENABLES1:

include/linux/mfd/tacna/registers.h

@@ -212,6 +212,8 @@
 #define TACNA_AUXPDM1_CONTROL1				0x4308
 #define TACNA_AUXPDM2_CONTROL1				0x4310
 #define TACNA_AUXPDM3_CONTROL1				0x4318
+#define TACNA_ADC1L_ANA_CONTROL1			0x4688
+#define TACNA_ADC1R_ANA_CONTROL1			0x468c
 #define TACNA_ADC1L_LP_CONTROL1				0x46a0
 #define TACNA_ADC1R_LP_CONTROL1				0x46a4
 #define TACNA_DACMON_CONTROL1				0x4800
@@ -3939,6 +3941,18 @@
 #define TACNA_AUXPDM3_NOISE_SHAPE_SHIFT				 1
 #define TACNA_AUXPDM3_NOISE_SHAPE_WIDTH				 1
 
+/* (0x4688) ADC1L_ANA_CONTROL1 */
+#define TACNA_ADC1L_INT_ENA_FRC				0x00000002
+#define TACNA_ADC1L_INT_ENA_FRC_MASK			0x00000002
+#define TACNA_ADC1L_INT_ENA_FRC_SHIFT				 1
+#define TACNA_ADC1L_INT_ENA_FRC_WIDTH				 1
+
+/* (0x468c) ADC1R_ANA_CONTROL1 */
+#define TACNA_ADC1R_INT_ENA_FRC				0x00000002
+#define TACNA_ADC1R_INT_ENA_FRC_MASK			0x00000002
+#define TACNA_ADC1R_INT_ENA_FRC_SHIFT				 1
+#define TACNA_ADC1R_INT_ENA_FRC_WIDTH				 1
+
 /* (0x46a0) ADC1L_LP_CONTROL1 */
 #define TACNA_IN1L_DAC_LOWIDD_EN			0x00000200
 #define TACNA_IN1L_DAC_LOWIDD_EN_MASK			0x00000200