Skip to content

Commit f4d54b4

Browse files
author
Lucas Tanure
committed
Merge branch 'v4.14-tacna' into v4.14-clsic
Change-Id: I28664b81be5fc641d567cc4a708abadbf0a5d6a2
2 parents 2c6d2e8 + 874f768 commit f4d54b4

File tree

10 files changed

+121
-858
lines changed

10 files changed

+121
-858
lines changed

‎drivers/mfd/cs47l96-tables.c‎

Lines changed: 0 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -198,16 +198,6 @@ static const struct reg_default cs47l96_reg_default[] = {
198198
{ 0x00004a18, 0x00000000 }, /* OUTPUT_AEC_ENABLE_1 */
199199
{ 0x00004a20, 0x00000000 }, /* OUTPUT_AEC_CONTROL_1 */
200200
{ 0x00004a24, 0x00000000 }, /* OUTPUT_NG_CONTROL_1 */
201-
{ 0x00004c14, 0x00000033 }, /* EDRE_ENABLE */
202-
{ 0x00004c18, 0x00000000 }, /* EDRE_MANUAL */
203-
{ 0x00004e78, 0x00000000 }, /* FRF_COEFF_1L_1 */
204-
{ 0x00004e7c, 0x00000000 }, /* FRF_COEFF_1L_2 */
205-
{ 0x00004e98, 0x00000000 }, /* FRF_COEFF_1R_1 */
206-
{ 0x00004e9c, 0x00000000 }, /* FRF_COEFF_1R_2 */
207-
{ 0x00004f78, 0x00000000 }, /* FRF_COEFF_5L_1 */
208-
{ 0x00004f7c, 0x00000000 }, /* FRF_COEFF_5L_2 */
209-
{ 0x00004f98, 0x00000000 }, /* FRF_COEFF_5R_1 */
210-
{ 0x00004f9c, 0x00000000 }, /* FRF_COEFF_5R_2 */
211201
{ 0x00005000, 0x00000000 }, /* OUTH_ENABLE_1 */
212202
{ 0x00005100, 0x20000000 }, /* OUTH_CONFIG_1 */
213203
{ 0x00005104, 0x000000c0 }, /* OUTHL_VOLUME_1 */
@@ -915,11 +905,9 @@ static const struct reg_default cs47l96_reg_default[] = {
915905
{ 0x0000fc24, 0x00002020 }, /* US3AO_CONTROL */
916906
{ 0x0000fc28, 0x00000000 }, /* US3AO_DET_CONTROL */
917907
{ 0x00010004, 0x00000000 }, /* AO_CTRL2 */
918-
{ 0x00017008, 0x00000000 }, /* DSP1_CTRL_SETUP */
919908
{ 0x00017208, 0x00000000 }, /* DSP1AO_CTRL_SETUP */
920909
{ 0x00017554, 0x00000000 }, /* CODEC_AO_BRIDGE_ERR_HADDR_ERR */
921910
{ 0x00017558, 0x00000000 }, /* AO_CODEC_BRIDGE_ERR_HADDR_ERR */
922-
{ 0x00017560, 0x00000003 }, /* FLL_DSP_CTRL */
923911
{ 0x00017580, 0x00000000 }, /* IN_PDMCLK_SEL */
924912
{ 0x00017584, 0x00000000 }, /* AUXPDM_SWM_SEL */
925913
{ 0x00017588, 0x00000000 }, /* ASP2_OUT5_SEL */
@@ -937,11 +925,6 @@ static const struct reg_default cs47l96_reg_default[] = {
937925
{ 0x00018138, 0xffffffff }, /* IRQ1_MASK_11 */
938926
{ 0x0001813c, 0xffffffff }, /* IRQ1_MASK_12 */
939927
{ 0x00018140, 0xffffffff }, /* IRQ1_MASK_13 */
940-
{ 0x00018144, 0xffffffff }, /* IRQ1_MASK_14 */
941-
{ 0x00018148, 0xffffffff }, /* IRQ1_MASK_15 */
942-
{ 0x00018150, 0xffffffff }, /* IRQ1_MASK_17 */
943-
{ 0x00018154, 0xffffffff }, /* IRQ1_MASK_18 */
944-
{ 0x00018158, 0xffffffff }, /* IRQ1_MASK_19 */
945928
{ 0x00018238, 0xffff0000 }, /* IRQ1_EDGE_11 */
946929
{ 0x00200400, 0x00000000 }, /* CPF1_RX_GPR_CONTROL1 */
947930
{ 0x00210000, 0x00000000 }, /* CPF1_TX_RDDATA1 */
@@ -1213,16 +1196,6 @@ static bool cs47l96_readable_register(struct device *dev, unsigned int reg)
12131196
case TACNA_OUTPUT_AEC_STATUS_1:
12141197
case TACNA_OUTPUT_AEC_CONTROL_1:
12151198
case TACNA_OUTPUT_NG_CONTROL_1:
1216-
case TACNA_EDRE_ENABLE:
1217-
case TACNA_EDRE_MANUAL:
1218-
case TACNA_FRF_COEFF_1L_1:
1219-
case TACNA_FRF_COEFF_1L_2:
1220-
case TACNA_FRF_COEFF_1R_1:
1221-
case TACNA_FRF_COEFF_1R_2:
1222-
case TACNA_FRF_COEFF_5L_1:
1223-
case TACNA_FRF_COEFF_5L_2:
1224-
case TACNA_FRF_COEFF_5R_1:
1225-
case TACNA_FRF_COEFF_5R_2:
12261199
case TACNA_OUTH_ENABLE_1:
12271200
case TACNA_OUTH_CONFIG_1:
12281201
case TACNA_OUTHL_VOLUME_1:
@@ -1870,11 +1843,9 @@ static bool cs47l96_readable_register(struct device *dev, unsigned int reg)
18701843
case TACNA_US3AO_CONTROL:
18711844
case TACNA_US3AO_DET_CONTROL:
18721845
case TACNA_AO_CTRL2:
1873-
case TACNA_DSP1_CTRL_SETUP:
18741846
case TACNA_DSP1AO_CTRL_SETUP:
18751847
case TACNA_CODEC_AO_BRIDGE_ERR_HADDR_ERR:
18761848
case TACNA_AO_CODEC_BRIDGE_ERR_HADDR_ERR:
1877-
case TACNA_FLL_DSP_CTRL:
18781849
case TACNA_IN_PDMCLK_SEL:
18791850
case TACNA_AUXPDM_SWM_SEL:
18801851
case TACNA_ASP2_OUT5_SEL:

‎drivers/mfd/cs48l32-tables.c‎

Lines changed: 6 additions & 88 deletions
Original file line numberDiff line numberDiff line change
@@ -376,8 +376,6 @@ static const struct reg_default cs48l32_reg_default[] = {
376376
{ 0x0000c000, 0x00000000 }, /* PWM_DRIVE_1 */
377377
{ 0x0000c004, 0x00000100 }, /* PWM_DRIVE_2 */
378378
{ 0x0000c008, 0x00000100 }, /* PWM_DRIVE_3 */
379-
{ 0x00017008, 0x00000000 }, /* DSP1_CTRL_SETUP */
380-
{ 0x00017560, 0x00000000 }, /* FLL_DSP_CTRL */
381379
{ 0x00018000, 0x00000000 }, /* IRQ1_CFG */
382380
{ 0x00018110, 0xffffffff }, /* IRQ1_MASK_1 */
383381
{ 0x00018114, 0xfffffff7 }, /* IRQ1_MASK_2 */
@@ -792,50 +790,9 @@ static bool cs48l32_readable_register(struct device *dev, unsigned int reg)
792790
case TACNA_PWM_DRIVE_1:
793791
case TACNA_PWM_DRIVE_2:
794792
case TACNA_PWM_DRIVE_3:
795-
case TACNA_DSP1_CTRL_SETUP:
796-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_0:
797-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_1:
798-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_2:
799-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_3:
800-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_4:
801-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_5:
802-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_6:
803-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_7:
804-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_8:
805-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_9:
806-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_10:
807-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_11:
808-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_12:
809-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_13:
810-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_14:
811-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_15:
812-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_16:
813-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_17:
814-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_18:
815-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_19:
816-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_20:
817-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_21:
818-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_22:
819-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_23:
820-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_24:
821-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_0:
822-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_1:
823-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_2:
824-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_3:
825-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_4:
826-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_5:
827-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_6:
828-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_7:
829-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_8:
830-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_0:
831-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_1:
832-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_2:
833-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_3:
834-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_4:
835-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_5:
836-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_6:
837-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_7:
838-
case TACNA_FLL_DSP_CTRL:
793+
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_0 ... CS48L32_DSP1_XM_SRAM_IBUS_SETUP_24:
794+
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_0 ... CS48L32_DSP1_YM_SRAM_IBUS_SETUP_8:
795+
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_0 ... CS48L32_DSP1_PM_SRAM_IBUS_SETUP_7:
839796
case TACNA_IRQ1_CFG:
840797
case TACNA_IRQ1_STATUS:
841798
case TACNA_IRQ1_EINT_1 ... TACNA_IRQ1_EINT_11:
@@ -868,48 +825,9 @@ static bool cs48l32_volatile_register(struct device *dev, unsigned int reg)
868825
case TACNA_INPUT_STATUS:
869826
case TACNA_INPUT_CONTROL3:
870827
case TACNA_FX_STATUS:
871-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_0:
872-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_1:
873-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_2:
874-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_3:
875-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_4:
876-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_5:
877-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_6:
878-
case TACNA_DSP1_XM_SRAM_IBUS_SETUP_7:
879-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_8:
880-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_9:
881-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_10:
882-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_11:
883-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_12:
884-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_13:
885-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_14:
886-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_15:
887-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_16:
888-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_17:
889-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_18:
890-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_19:
891-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_20:
892-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_21:
893-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_22:
894-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_23:
895-
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_24:
896-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_0:
897-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_1:
898-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_2:
899-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_3:
900-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_4:
901-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_5:
902-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_6:
903-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_7:
904-
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_8:
905-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_0:
906-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_1:
907-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_2:
908-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_3:
909-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_4:
910-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_5:
911-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_6:
912-
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_7:
828+
case CS48L32_DSP1_XM_SRAM_IBUS_SETUP_0 ... CS48L32_DSP1_XM_SRAM_IBUS_SETUP_24:
829+
case CS48L32_DSP1_YM_SRAM_IBUS_SETUP_0 ... CS48L32_DSP1_YM_SRAM_IBUS_SETUP_8:
830+
case CS48L32_DSP1_PM_SRAM_IBUS_SETUP_0 ... CS48L32_DSP1_PM_SRAM_IBUS_SETUP_7:
913831
case TACNA_IRQ1_STATUS:
914832
case TACNA_IRQ1_EINT_1 ... TACNA_IRQ1_EINT_11:
915833
case TACNA_IRQ1_STS_1 ... TACNA_IRQ1_STS_11:

‎drivers/mfd/tacna-core.c‎

Lines changed: 18 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -582,8 +582,22 @@ static int tacna_configure_clk32k(struct tacna *tacna)
582582
}
583583
break;
584584
case TACNA_32KZ_MCLK1:
585-
case TACNA_32KZ_MCLK2:
586585
case TACNA_32KZ_SYSCLK:
586+
switch (tacna->type) {
587+
case CS48L31:
588+
case CS48L32:
589+
case CS48L33:
590+
break;
591+
default:
592+
ret = pm_runtime_get_sync(tacna->dev);
593+
if (ret)
594+
dev_err(tacna->dev,
595+
"Failed to enable chip for 32kHz clock: %d\n",
596+
ret);
597+
break;
598+
}
599+
/* Intentional fall-through */
600+
case TACNA_32KZ_MCLK2:
587601
mclk_src = tacna->pdata.clk32k_src - 1;
588602
break;
589603
default:
@@ -592,10 +606,9 @@ static int tacna_configure_clk32k(struct tacna *tacna)
592606
return -EINVAL;
593607
}
594608

595-
ret = regmap_update_bits(tacna->regmap,
596-
TACNA_CLOCK32K,
597-
TACNA_CLK_32K_EN_MASK | TACNA_CLK_32K_SRC_MASK,
598-
TACNA_CLK_32K_EN | mclk_src);
609+
ret = regmap_update_bits(tacna->regmap, TACNA_CLOCK32K,
610+
TACNA_CLK_32K_EN_MASK | TACNA_CLK_32K_SRC_MASK,
611+
TACNA_CLK_32K_EN | mclk_src);
599612
if (ret)
600613
dev_err(tacna->dev, "Failed to init 32k clock: %d\n", ret);
601614

‎drivers/pinctrl/pinctrl-tacna.c‎

Lines changed: 9 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1162,9 +1162,9 @@ static int tacna_pin_probe(struct platform_device *pdev)
11621162

11631163
tacna_pin_desc.npins = priv->chip->n_pins;
11641164

1165-
priv->pctl = pinctrl_register(&tacna_pin_desc, &pdev->dev, priv);
1166-
if (IS_ERR(priv->pctl)) {
1167-
ret = PTR_ERR(priv->pctl);
1165+
ret = devm_pinctrl_register_and_init(&pdev->dev, &tacna_pin_desc, priv,
1166+
&priv->pctl);
1167+
if (ret) {
11681168
dev_err(priv->dev, "Failed pinctrl register (%d)\n", ret);
11691169
return ret;
11701170
}
@@ -1177,23 +1177,19 @@ static int tacna_pin_probe(struct platform_device *pdev)
11771177
return ret;
11781178
}
11791179

1180-
dev_dbg(priv->dev, "pinctrl registered\n");
1181-
1182-
return 0;
1183-
}
1184-
1185-
static int tacna_pin_remove(struct platform_device *pdev)
1186-
{
1187-
struct tacna_pin_private *priv = platform_get_drvdata(pdev);
1180+
ret = pinctrl_enable(priv->pctl);
1181+
if (ret) {
1182+
dev_err(priv->dev, "Failed to enable pinctrl (%d)\n", ret);
1183+
return ret;
1184+
}
11881185

1189-
pinctrl_unregister(priv->pctl);
1186+
dev_dbg(priv->dev, "pinctrl registered\n");
11901187

11911188
return 0;
11921189
}
11931190

11941191
static struct platform_driver tacna_pin_driver = {
11951192
.probe = &tacna_pin_probe,
1196-
.remove = &tacna_pin_remove,
11971193
.driver = {
11981194
.name = "tacna-pinctrl",
11991195
},

0 commit comments

Comments
 (0)