Qualcomm AI Engine Direct - support SW6100 (pytorch#16003)

Summary
- Support SOC SW6100

Test plan
- Use unit test with -m SW6100

Co-authored-by: haowhsu-quic <[email protected]>

Author: jethroqti

backends/qualcomm/README.md

@@ -31,6 +31,7 @@ Please check `generate_qnn_executorch_compiler_spec()` in
 - SXR2330P
 - QCS9100
 - SAR2230P
+- SW6100
 
 ### Adding more supported Chipset
 Currently, users cannot add additional chipset models because the chipset ID is not accessible to community users. If you have specific chipset models you wish to add, please contact one of the authors in the `Code Reviews` section at the bottom of this page.

backends/qualcomm/serialization/qc_compiler_spec.fbs

@@ -49,6 +49,7 @@ enum QcomChipset: int {
   QCS9100 = 77,
   SAR2230P = 95,
   SA8255 = 52,
+  SW6100 = 96,
 }
 
 /// Indicate the information of the specified SoC.

backends/qualcomm/serialization/qc_schema.py

@@ -55,6 +55,7 @@ class QcomChipset(IntEnum):
     QCS9100 = 77  # v73
     SAR2230P = 95  # v81
     SA8255 = 52  # v73
+    SW6100 = 96  # v81
 
 
 @dataclass
@@ -80,6 +81,7 @@ class SocInfo:
     QcomChipset.SXR2330P: SocInfo(QcomChipset.SXR2330P, HtpInfo(HtpArch.V79, 8)),
     QcomChipset.QCS9100: SocInfo(QcomChipset.QCS9100, HtpInfo(HtpArch.V73, 8)),
     QcomChipset.SAR2230P: SocInfo(QcomChipset.SAR2230P, HtpInfo(HtpArch.V81, 4)),
+    QcomChipset.SW6100: SocInfo(QcomChipset.SW6100, HtpInfo(HtpArch.V81, 4)),
 }
 
 

backends/qualcomm/utils/utils.py

@@ -1106,6 +1106,7 @@ def get_soc_to_arch_map():
         "SXR2330P": HtpArch.V79,
         "QCS9100": HtpArch.V73,
         "SAR2230P": HtpArch.V81,
+        "SW6100": HtpArch.V81,
     }
 
 
@@ -1127,6 +1128,7 @@ def get_soc_to_chipset_map():
         "SXR2330P": QcomChipset.SXR2330P,
         "QCS9100": QcomChipset.QCS9100,
         "SAR2230P": QcomChipset.SAR2230P,
+        "SW6100": QcomChipset.SW6100,
     }