handle inline anomaly in DropStructVecs and fix AES verilog 95/2001 compilation and testing

Author: Oron Port

compiler/stages/src/main/scala/dfhdl/backends.scala

@@ -8,7 +8,7 @@ import dfhdl.compiler.stages.verilog.{VerilogBackend, VerilogPrinter, VerilogDia
 import dfhdl.compiler.stages.vhdl.{VHDLBackend, VHDLPrinter, VHDLDialect}
 import dfhdl.compiler.ir.DB
 object backends:
-  protected[dfhdl] class verilog(val dialect: VerilogDialect) extends BackendCompiler:
+  sealed class verilog(val dialect: VerilogDialect) extends BackendCompiler:
     def printer(
         cd: CompiledDesign
     )(using CompilerOptions, PrinterOptions): Printer =
@@ -28,7 +28,7 @@ object backends:
     val sv2012: verilog = new verilog(VerilogDialect.sv2012)
     val sv2017: verilog = new verilog(VerilogDialect.sv2017)
 
-  protected[dfhdl] class vhdl(val dialect: VHDLDialect) extends BackendCompiler:
+  sealed class vhdl(val dialect: VHDLDialect) extends BackendCompiler:
     def printer(
         cd: CompiledDesign
     )(using CompilerOptions, PrinterOptions): Printer =

compiler/stages/src/main/scala/dfhdl/compiler/stages/DropStructsVecs.scala

@@ -46,7 +46,7 @@ case object DropStructsVecs extends Stage:
     object PartialSel:
       import DFVal.Alias.*
       def unapply(partial: ApplyIdx | ApplyRange | SelectField)(using MemberGetSet): Boolean =
-        replacementMap.contains(partial.relValRef.get) && !handledPartials.contains(partial)
+        replacementMap.contains(partial.relValRef.get)
     ///////////////////////////////////////////////////////////////////////////////
     // Stage 1: Replace structs and vectors with Bits
     ///////////////////////////////////////////////////////////////////////////////
@@ -147,7 +147,7 @@ case object DropStructsVecs extends Stage:
       given RefGen = RefGen.fromGetSet
       // we need to reverse the list because we want to handle the innermost partial first
       val patchList2: List[(DFMember, Patch)] = stage1.members.view.reverse.collect {
-        case partial @ PartialSel() =>
+        case partial @ PartialSel() if !handledPartials.contains(partial) =>
           val dsn = new MetaDesign(
             partial,
             Patch.Add.Config.ReplaceWithLast(Patch.Replace.Config.FullReplacement)

compiler/stages/src/test/scala/StagesSpec/DropStructsVecsSpec.scala

@@ -245,4 +245,30 @@ class DropStructsVecsSpec extends StageSpec(stageCreatesUnrefAnons = true):
          |""".stripMargin
     )
   }
+
+  test("Inline anomaly") {
+    given options.CompilerOptions.Backend = backends.verilog.v95
+    val Rcon: Bits[8] X 4 X 2 <> CONST    = DFVector(Bits(8) X 4 X 2)(
+      DFVector(Bits(8) X 4)(h"01", h"02", h"03", h"04"),
+      DFVector(Bits(8) X 4)(h"05", h"06", h"07", h"08")
+    )
+
+    extension (lhs: Bits[8] X 4 <> VAL)
+      @inline def +++(rhs: Bits[8] X 4 <> VAL): Bits[8] X 4 <> DFRET =
+        lhs.elements.lazyZip(rhs.elements).map(_ ^ _).toList
+
+    class Bar extends RTDesign:
+      val o = Bits[8] X 4 <> OUT
+      o := Rcon(0) +++ Rcon(0)
+    val top = (new Bar).dropStructsVecs
+    assertCodeString(
+      top,
+      """|val Rcon: Bits[64] <> CONST = ((h"01", h"02", h"03", h"04").toBits, (h"05", h"06", h"07", h"08").toBits).toBits
+         |class Bar extends RTDesign:
+         |  val o = Bits(32) <> OUT
+         |  o := (Rcon(63, 56) ^ Rcon(63, 56), Rcon(55, 48) ^ Rcon(55, 48), Rcon(47, 40) ^ Rcon(47, 40), Rcon(39, 32) ^ Rcon(39, 32)).toBits
+         |end Bar
+         |""".stripMargin
+    )
+  }
 end DropStructsVecsSpec

lib/src/test/resources/ref/AES.CipherSpecNoOpaques/verilog.v2001/hdl/keyExpansion.v

@@ -304,9 +304,9 @@ module keyExpansion(
   assign w_1                     = key[95:64];
   assign w_2                     = key[63:32];
   assign w_3                     = key[31:0];
-  assign keySchedule_part_000    = w_0[31:24] ^ (o_part_subWord_inst_o[31:24] ^ Rcon[1][31:24]);
-  assign keySchedule_part_001    = w_0[23:16] ^ (o_part_subWord_inst_o[23:16] ^ Rcon[1][23:16]);
-  assign keySchedule_part_002    = w_0[15:8] ^ (o_part_subWord_inst_o[15:8] ^ Rcon[1][15:8]);
+  assign keySchedule_part_000    = w_0[31:24] ^ (o_part_subWord_inst_o[31:24] ^ Rcon[319:312]);
+  assign keySchedule_part_001    = w_0[23:16] ^ (o_part_subWord_inst_o[23:16] ^ Rcon[311:304]);
+  assign keySchedule_part_002    = w_0[15:8] ^ (o_part_subWord_inst_o[15:8] ^ Rcon[303:296]);
   assign keySchedule_part_003    = w_0[7:0] ^ (o_part_subWord_inst_o[7:0] ^ Rcon[295:288]);
   assign keySchedule_part_004    = w_1[31:24] ^ keySchedule_part_000;
   assign keySchedule_part_005    = w_1[23:16] ^ keySchedule_part_001;
@@ -321,9 +321,9 @@ module keyExpansion(
   assign lhs_part_02             = w_3[15:8] ^ keySchedule_part_010;
   assign lhs_part_03             = w_3[7:0] ^ keySchedule_part_011;
   assign lhs_part_04             = {lhs_part_00, lhs_part_01, lhs_part_02, lhs_part_03};
-  assign keySchedule_part_012    = keySchedule_part_000 ^ (subWord_inst_0_o[31:24] ^ Rcon[2][31:24]);
-  assign keySchedule_part_013    = keySchedule_part_001 ^ (subWord_inst_0_o[23:16] ^ Rcon[2][23:16]);
-  assign keySchedule_part_014    = keySchedule_part_002 ^ (subWord_inst_0_o[15:8] ^ Rcon[2][15:8]);
+  assign keySchedule_part_012    = keySchedule_part_000 ^ (subWord_inst_0_o[31:24] ^ Rcon[287:280]);
+  assign keySchedule_part_013    = keySchedule_part_001 ^ (subWord_inst_0_o[23:16] ^ Rcon[279:272]);
+  assign keySchedule_part_014    = keySchedule_part_002 ^ (subWord_inst_0_o[15:8] ^ Rcon[271:264]);
   assign keySchedule_part_015    = keySchedule_part_003 ^ (subWord_inst_0_o[7:0] ^ Rcon[263:256]);
   assign keySchedule_part_016    = keySchedule_part_004 ^ keySchedule_part_012;
   assign keySchedule_part_017    = keySchedule_part_005 ^ keySchedule_part_013;
@@ -338,9 +338,9 @@ module keyExpansion(
   assign lhs_part_07             = lhs_part_02 ^ keySchedule_part_022;
   assign lhs_part_08             = lhs_part_03 ^ keySchedule_part_023;
   assign lhs_part_09             = {lhs_part_05, lhs_part_06, lhs_part_07, lhs_part_08};
-  assign keySchedule_part_024    = keySchedule_part_012 ^ (subWord_inst_1_o[31:24] ^ Rcon[3][31:24]);
-  assign keySchedule_part_025    = keySchedule_part_013 ^ (subWord_inst_1_o[23:16] ^ Rcon[3][23:16]);
-  assign keySchedule_part_026    = keySchedule_part_014 ^ (subWord_inst_1_o[15:8] ^ Rcon[3][15:8]);
+  assign keySchedule_part_024    = keySchedule_part_012 ^ (subWord_inst_1_o[31:24] ^ Rcon[255:248]);
+  assign keySchedule_part_025    = keySchedule_part_013 ^ (subWord_inst_1_o[23:16] ^ Rcon[247:240]);
+  assign keySchedule_part_026    = keySchedule_part_014 ^ (subWord_inst_1_o[15:8] ^ Rcon[239:232]);
   assign keySchedule_part_027    = keySchedule_part_015 ^ (subWord_inst_1_o[7:0] ^ Rcon[231:224]);
   assign keySchedule_part_028    = keySchedule_part_016 ^ keySchedule_part_024;
   assign keySchedule_part_029    = keySchedule_part_017 ^ keySchedule_part_025;
@@ -355,9 +355,9 @@ module keyExpansion(
   assign lhs_part_12             = lhs_part_07 ^ keySchedule_part_034;
   assign lhs_part_13             = lhs_part_08 ^ keySchedule_part_035;
   assign lhs_part_14             = {lhs_part_10, lhs_part_11, lhs_part_12, lhs_part_13};
-  assign keySchedule_part_036    = keySchedule_part_024 ^ (subWord_inst_2_o[31:24] ^ Rcon[4][31:24]);
-  assign keySchedule_part_037    = keySchedule_part_025 ^ (subWord_inst_2_o[23:16] ^ Rcon[4][23:16]);
-  assign keySchedule_part_038    = keySchedule_part_026 ^ (subWord_inst_2_o[15:8] ^ Rcon[4][15:8]);
+  assign keySchedule_part_036    = keySchedule_part_024 ^ (subWord_inst_2_o[31:24] ^ Rcon[223:216]);
+  assign keySchedule_part_037    = keySchedule_part_025 ^ (subWord_inst_2_o[23:16] ^ Rcon[215:208]);
+  assign keySchedule_part_038    = keySchedule_part_026 ^ (subWord_inst_2_o[15:8] ^ Rcon[207:200]);
   assign keySchedule_part_039    = keySchedule_part_027 ^ (subWord_inst_2_o[7:0] ^ Rcon[199:192]);
   assign keySchedule_part_040    = keySchedule_part_028 ^ keySchedule_part_036;
   assign keySchedule_part_041    = keySchedule_part_029 ^ keySchedule_part_037;
@@ -372,9 +372,9 @@ module keyExpansion(
   assign lhs_part_17             = lhs_part_12 ^ keySchedule_part_046;
   assign lhs_part_18             = lhs_part_13 ^ keySchedule_part_047;
   assign lhs_part_19             = {lhs_part_15, lhs_part_16, lhs_part_17, lhs_part_18};
-  assign keySchedule_part_048    = keySchedule_part_036 ^ (subWord_inst_3_o[31:24] ^ Rcon[5][31:24]);
-  assign keySchedule_part_049    = keySchedule_part_037 ^ (subWord_inst_3_o[23:16] ^ Rcon[5][23:16]);
-  assign keySchedule_part_050    = keySchedule_part_038 ^ (subWord_inst_3_o[15:8] ^ Rcon[5][15:8]);
+  assign keySchedule_part_048    = keySchedule_part_036 ^ (subWord_inst_3_o[31:24] ^ Rcon[191:184]);
+  assign keySchedule_part_049    = keySchedule_part_037 ^ (subWord_inst_3_o[23:16] ^ Rcon[183:176]);
+  assign keySchedule_part_050    = keySchedule_part_038 ^ (subWord_inst_3_o[15:8] ^ Rcon[175:168]);
   assign keySchedule_part_051    = keySchedule_part_039 ^ (subWord_inst_3_o[7:0] ^ Rcon[167:160]);
   assign keySchedule_part_052    = keySchedule_part_040 ^ keySchedule_part_048;
   assign keySchedule_part_053    = keySchedule_part_041 ^ keySchedule_part_049;
@@ -389,9 +389,9 @@ module keyExpansion(
   assign lhs_part_22             = lhs_part_17 ^ keySchedule_part_058;
   assign lhs_part_23             = lhs_part_18 ^ keySchedule_part_059;
   assign lhs_part_24             = {lhs_part_20, lhs_part_21, lhs_part_22, lhs_part_23};
-  assign keySchedule_part_060    = keySchedule_part_048 ^ (subWord_inst_4_o[31:24] ^ Rcon[6][31:24]);
-  assign keySchedule_part_061    = keySchedule_part_049 ^ (subWord_inst_4_o[23:16] ^ Rcon[6][23:16]);
-  assign keySchedule_part_062    = keySchedule_part_050 ^ (subWord_inst_4_o[15:8] ^ Rcon[6][15:8]);
+  assign keySchedule_part_060    = keySchedule_part_048 ^ (subWord_inst_4_o[31:24] ^ Rcon[159:152]);
+  assign keySchedule_part_061    = keySchedule_part_049 ^ (subWord_inst_4_o[23:16] ^ Rcon[151:144]);
+  assign keySchedule_part_062    = keySchedule_part_050 ^ (subWord_inst_4_o[15:8] ^ Rcon[143:136]);
   assign keySchedule_part_063    = keySchedule_part_051 ^ (subWord_inst_4_o[7:0] ^ Rcon[135:128]);
   assign keySchedule_part_064    = keySchedule_part_052 ^ keySchedule_part_060;
   assign keySchedule_part_065    = keySchedule_part_053 ^ keySchedule_part_061;
@@ -406,9 +406,9 @@ module keyExpansion(
   assign lhs_part_27             = lhs_part_22 ^ keySchedule_part_070;
   assign lhs_part_28             = lhs_part_23 ^ keySchedule_part_071;
   assign lhs_part_29             = {lhs_part_25, lhs_part_26, lhs_part_27, lhs_part_28};
-  assign keySchedule_part_072    = keySchedule_part_060 ^ (subWord_inst_5_o[31:24] ^ Rcon[7][31:24]);
-  assign keySchedule_part_073    = keySchedule_part_061 ^ (subWord_inst_5_o[23:16] ^ Rcon[7][23:16]);
-  assign keySchedule_part_074    = keySchedule_part_062 ^ (subWord_inst_5_o[15:8] ^ Rcon[7][15:8]);
+  assign keySchedule_part_072    = keySchedule_part_060 ^ (subWord_inst_5_o[31:24] ^ Rcon[127:120]);
+  assign keySchedule_part_073    = keySchedule_part_061 ^ (subWord_inst_5_o[23:16] ^ Rcon[119:112]);
+  assign keySchedule_part_074    = keySchedule_part_062 ^ (subWord_inst_5_o[15:8] ^ Rcon[111:104]);
   assign keySchedule_part_075    = keySchedule_part_063 ^ (subWord_inst_5_o[7:0] ^ Rcon[103:96]);
   assign keySchedule_part_076    = keySchedule_part_064 ^ keySchedule_part_072;
   assign keySchedule_part_077    = keySchedule_part_065 ^ keySchedule_part_073;
@@ -423,9 +423,9 @@ module keyExpansion(
   assign lhs_part_32             = lhs_part_27 ^ keySchedule_part_082;
   assign lhs_part_33             = lhs_part_28 ^ keySchedule_part_083;
   assign lhs_part_34             = {lhs_part_30, lhs_part_31, lhs_part_32, lhs_part_33};
-  assign keySchedule_part_084    = keySchedule_part_072 ^ (subWord_inst_6_o[31:24] ^ Rcon[8][31:24]);
-  assign keySchedule_part_085    = keySchedule_part_073 ^ (subWord_inst_6_o[23:16] ^ Rcon[8][23:16]);
-  assign keySchedule_part_086    = keySchedule_part_074 ^ (subWord_inst_6_o[15:8] ^ Rcon[8][15:8]);
+  assign keySchedule_part_084    = keySchedule_part_072 ^ (subWord_inst_6_o[31:24] ^ Rcon[95:88]);
+  assign keySchedule_part_085    = keySchedule_part_073 ^ (subWord_inst_6_o[23:16] ^ Rcon[87:80]);
+  assign keySchedule_part_086    = keySchedule_part_074 ^ (subWord_inst_6_o[15:8] ^ Rcon[79:72]);
   assign keySchedule_part_087    = keySchedule_part_075 ^ (subWord_inst_6_o[7:0] ^ Rcon[71:64]);
   assign keySchedule_part_088    = keySchedule_part_076 ^ keySchedule_part_084;
   assign keySchedule_part_089    = keySchedule_part_077 ^ keySchedule_part_085;
@@ -440,9 +440,9 @@ module keyExpansion(
   assign lhs_part_37             = lhs_part_32 ^ keySchedule_part_094;
   assign lhs_part_38             = lhs_part_33 ^ keySchedule_part_095;
   assign lhs_part_39             = {lhs_part_35, lhs_part_36, lhs_part_37, lhs_part_38};
-  assign keySchedule_part_096    = keySchedule_part_084 ^ (subWord_inst_7_o[31:24] ^ Rcon[9][31:24]);
-  assign keySchedule_part_097    = keySchedule_part_085 ^ (subWord_inst_7_o[23:16] ^ Rcon[9][23:16]);
-  assign keySchedule_part_098    = keySchedule_part_086 ^ (subWord_inst_7_o[15:8] ^ Rcon[9][15:8]);
+  assign keySchedule_part_096    = keySchedule_part_084 ^ (subWord_inst_7_o[31:24] ^ Rcon[63:56]);
+  assign keySchedule_part_097    = keySchedule_part_085 ^ (subWord_inst_7_o[23:16] ^ Rcon[55:48]);
+  assign keySchedule_part_098    = keySchedule_part_086 ^ (subWord_inst_7_o[15:8] ^ Rcon[47:40]);
   assign keySchedule_part_099    = keySchedule_part_087 ^ (subWord_inst_7_o[7:0] ^ Rcon[39:32]);
   assign keySchedule_part_100    = keySchedule_part_088 ^ keySchedule_part_096;
   assign keySchedule_part_101    = keySchedule_part_089 ^ keySchedule_part_097;
@@ -457,9 +457,9 @@ module keyExpansion(
   assign lhs_part_42             = lhs_part_37 ^ keySchedule_part_106;
   assign lhs_part_43             = lhs_part_38 ^ keySchedule_part_107;
   assign lhs_part_44             = {lhs_part_40, lhs_part_41, lhs_part_42, lhs_part_43};
-  assign keySchedule_part_108    = keySchedule_part_096 ^ (subWord_inst_8_o[31:24] ^ Rcon[10][31:24]);
-  assign keySchedule_part_109    = keySchedule_part_097 ^ (subWord_inst_8_o[23:16] ^ Rcon[10][23:16]);
-  assign keySchedule_part_110    = keySchedule_part_098 ^ (subWord_inst_8_o[15:8] ^ Rcon[10][15:8]);
+  assign keySchedule_part_108    = keySchedule_part_096 ^ (subWord_inst_8_o[31:24] ^ Rcon[31:24]);
+  assign keySchedule_part_109    = keySchedule_part_097 ^ (subWord_inst_8_o[23:16] ^ Rcon[23:16]);
+  assign keySchedule_part_110    = keySchedule_part_098 ^ (subWord_inst_8_o[15:8] ^ Rcon[15:8]);
   assign keySchedule_part_111    = keySchedule_part_099 ^ (subWord_inst_8_o[7:0] ^ Rcon[7:0]);
   assign keySchedule_part_112    = keySchedule_part_100 ^ keySchedule_part_108;
   assign keySchedule_part_113    = keySchedule_part_101 ^ keySchedule_part_109;