project constraints from resources to connected dfVals

Author: Oron Port

compiler/ir/src/main/scala/dfhdl/compiler/ir/annotation.scala

@@ -61,9 +61,10 @@ object constraints:
   import annotation.HWAnnotation
   sealed abstract class Constraint extends HWAnnotation derives ReadWriter
   sealed abstract class GlobalConstraint extends Constraint derives ReadWriter
-  sealed abstract class SigConstraint extends Constraint derives ReadWriter:
+  sealed abstract class SigConstraint extends Constraint, HasTypeName derives ReadWriter:
     def merge(that: SigConstraint): Option[SigConstraint] =
       if (this == that) Some(this) else None
+    def updateBitIdx(bitIdx: ConfigN[Int]): SigConstraint
     val bitIdx: ConfigN[Int]
   final case class Device(name: String, properties: Map[String, String]) extends GlobalConstraint
       derives CanEqual, ReadWriter:
@@ -83,6 +84,7 @@ object constraints:
         case (t1: T @unchecked, t2: T @unchecked) if t1 equals t2 => t1
         case x => throw new IllegalArgumentException("Constraint merge error: " + x)
   extension (list: List[SigConstraint])
+    /** Merge constraints that are of the same type and are mergeable. */
     def merge: List[SigConstraint] =
       list.foldLeft(List.empty[SigConstraint]) { (acc, cs) =>
         var merged = false
@@ -97,6 +99,19 @@ object constraints:
         if (merged) newAcc
         else cs :: newAcc
       }.reverse
+
+    /** Consolidate several constraints that are all the same for all the bits into a single
+      * constraint. This should be applied after merging.
+      */
+    def consolidate(length: Int)(using MemberGetSet): List[SigConstraint] =
+      list.groupByOrdered(_.typeName).map {
+        case (typeName, cs) if cs.length == length =>
+          val consolidated = cs.map(_.updateBitIdx(None))
+          if (consolidated.forall(_ =~ consolidated.head))
+            consolidated.head :: Nil
+          else cs
+        case (typeName, cs) => cs
+      }.flatten
   end extension
 
   private def csParam[T](name: String, value: ConfigN[T])(using printer: Printer): String =
@@ -134,6 +149,8 @@ object constraints:
             )
           )
         case _ => None
+    def updateBitIdx(bitIdx: ConfigN[Int]): SigConstraint =
+      this.copy(bitIdx = bitIdx)
     def codeString(using Printer): String =
       val params = List(
         csParam("bitIdx", bitIdx),
@@ -166,12 +183,15 @@ object constraints:
       protected def `prot_=~`(that: HWAnnotation)(using MemberGetSet): Boolean = this == that
       lazy val getRefs: List[DFRef.TwoWayAny] = Nil
       def copyWithNewRefs(using RefGen): this.type = this
+      def updateBitIdx(bitIdx: ConfigN[Int]): SigConstraint =
+        this.copy(bitIdx = bitIdx)
       def codeString(using Printer): String =
         val params = List(
           csParam("bitIdx", bitIdx),
           csParam("maxFreqMinPeriod", maxFreqMinPeriod)
         ).filter(_.nonEmpty).mkString(", ")
         s"""@timing.ignore($params)"""
+    end Ignore
 
     final case class Clock(
         rate: RateNumber

core/src/main/scala/dfhdl/core/DFVal.scala

@@ -12,6 +12,7 @@ import DFOpaque.Abstract as DFOpaqueA
 import dfhdl.compiler.ir.MemberGetSet
 import dfhdl.compiler.printing.{DefaultPrinter, Printer}
 import scala.annotation.tailrec
+import dfhdl.platforms.resources.Resource
 
 import scala.reflect.ClassTag
 final class DFVal[+T <: DFTypeAny, +M <: ModifierAny](val irValue: ir.DFVal | DFError)
@@ -1040,15 +1041,26 @@ object DFVal extends DFValLP:
     export DFTuple.Val.TCConv.given
     export DFVector.Val.TCConv.given
 
-  trait TC_Or_OPEN[T <: DFTypeAny, R] extends TC[T, R]
-  object TC_Or_OPEN:
-    type Exact[T <: DFTypeAny] = Exact1[DFTypeAny, T, [t <: DFTypeAny] =>> t, DFC, TC_Or_OPEN]
-    given fromOPEN[T <: DFTypeAny]: TC_Or_OPEN[T, OPEN] with
+  trait TC_Or_OPEN_Or_Resource[T <: DFTypeAny, R] extends TC[T, R]
+  object TC_Or_OPEN_Or_Resource:
+    type Exact[T <: DFTypeAny] =
+      Exact1[DFTypeAny, T, [t <: DFTypeAny] =>> t, DFC, TC_Or_OPEN_Or_Resource]
+    given fromOPEN[T <: DFTypeAny]: TC_Or_OPEN_Or_Resource[T, OPEN] with
       type OutP = NOTCONST
       def conv(dfType: T, from: OPEN)(using DFC): Out = DFVal.OPEN(dfType)
-    given fromTC[T <: DFTypeAny, R, TC <: DFVal.TC[T, R]](using tc: TC): TC_Or_OPEN[T, R] with
+    given fromTC[
+        T <: DFTypeAny,
+        R,
+        TC <: DFVal.TC[T, R]
+    ](using tc: TC): TC_Or_OPEN_Or_Resource[T, R] with
       type OutP = tc.OutP
       def conv(dfType: T, from: R)(using DFC): Out = tc(dfType, from)
+    given fromResource[T <: DFTypeAny, R <: Resource](using
+        Resource.CanConnect[R, DFValOf[T]] // just type checking
+    ): TC_Or_OPEN_Or_Resource[T, R] with
+      type OutP = NOTCONST
+      def conv(dfType: T, from: R)(using DFC): Out = ???
+  end TC_Or_OPEN_Or_Resource
 
   trait Compare[T <: DFTypeAny, V, Op <: FuncOp, C <: Boolean] extends TCCommon[T, V, DFValAny]:
     type OutP
@@ -1225,9 +1237,30 @@ extension [T <: DFTypeAny](dfVar: DFValOf[T])
     DFNet(dfVar.asIR, DFNet.Op.NBAssignment, rhs.asIR)
 
 extension [T <: DFTypeAny](lhs: DFValOf[T])
+  def connect(resource: Resource)(using dfc: DFC): Unit =
+    import dfc.getSet
+    lhs.asIR.departialDcl match
+      case Some(dcl, range) =>
+        val newSigConstraints =
+          if (range.length != dcl.width) resource.allSigConstraints.flatMap { cs =>
+            for (i <- range) yield cs.updateBitIdx(i)
+          }
+          else resource.allSigConstraints
+        val (existingSigConstraints, otherAnnotations) = dcl.meta.annotations.partition {
+          case cs: ir.constraints.SigConstraint => true
+          case _                                => false
+        }.asInstanceOf[(List[ir.constraints.SigConstraint], List[ir.annotation.HWAnnotation])]
+        val updatedSigConstraints =
+          (existingSigConstraints ++ newSigConstraints).merge.consolidate(dcl.width)
+        val updatedAnnotations = updatedSigConstraints ++ otherAnnotations
+        dcl.setMeta(m => m.copy(annotations = updatedAnnotations))
+      case None =>
+    end match
+  end connect
   def connect[R <: DFTypeAny](rhs: DFValOf[R])(using DFC): Unit =
     val op = if (dfc.lateConstruction) DFNet.Op.ViaConnection else DFNet.Op.Connection
     DFNet(lhs.asIR, op, rhs.asIR)
+end extension
 
 trait VarsTuple[T <: NonEmptyTuple]:
   type Width <: Int
@@ -1418,17 +1451,21 @@ object DFVarOps:
 end DFVarOps
 
 object DFPortOps:
-  protected type ConnectableOnly[C] = AssertGiven[
-    C <:< Modifier.Connectable,
+  protected type ConnectableOnly[C, R] = AssertGiven[
+    C <:< Modifier.Connectable | R <:< Resource,
     "The LHS of a connection must be a connectable DFHDL value (var/port)."
   ]
   extension [T <: DFTypeAny, C](dfPort: DFVal[T, Modifier[Any, C, Any, Any]])
-    def <>(rhs: DFVal.TC_Or_OPEN.Exact[T])(using
+    def <>(rhs: DFVal.TC_Or_OPEN_Or_Resource.Exact[T])(using
         DFC
     )(using
-        connectableOnly: ConnectableOnly[C]
+        connectableOnly: ConnectableOnly[C, rhs.ExactFrom]
     ): ConnectPlaceholder =
-      trydf { dfPort.connect(rhs(dfPort.dfType)) }
+      trydf {
+        rhs.exactFrom match
+          case resource: Resource => dfPort.connect(resource)
+          case _                  => dfPort.connect(rhs(dfPort.dfType))
+      }
       ConnectPlaceholder
   end extension
 end DFPortOps

core/src/main/scala/dfhdl/hdl.scala

@@ -26,6 +26,7 @@ protected object hdl:
   export internals.CommonOps.*
   export core.{dfType}
   export core.DFPhysical.Val.Ops.*
+  export platforms.resources.Resource.Ops.*
   export core.COMB_LOOP
   type Time = core.DFTime
   val Time = core.DFTime

core/src/main/scala/dfhdl/platforms/resources/Resource.scala

@@ -2,6 +2,7 @@ package dfhdl.platforms.resources
 import scala.annotation.implicitNotFound
 import scala.collection.mutable
 import dfhdl.compiler.ir.constraints.SigConstraint
+import dfhdl.core.*
 
 trait Resource extends ResourceContext:
   private val connections = mutable.ListBuffer[Resource]()
@@ -34,14 +35,18 @@ private trait ResourceLP:
       cc.connect(resource2, resource1)
 
 object Resource extends ResourceLP:
-  @implicitNotFound("Cannot connect the resources ${T} and ${R}")
-  trait CanConnect[T <: Resource, R <: Resource]:
+  @implicitNotFound("Cannot connect the resource ${T} with ${R}")
+  trait CanConnect[T <: Resource, R]:
     def connect(resource1: T, resource2: R): Unit
   given [T <: Resource, R <: Resource](using T =:= R): CanConnect[T, R] =
     (resource1: T, resource2: R) =>
       resource1.connect(resource2)
       resource2.connect(resource1)
+  given [T <: Resource, R <: DFValAny](using DFC): CanConnect[T, R] =
+    (resource: T, dfVal: R) => dfVal.connect(resource)
 
-  extension [T <: Resource](self: T)
-    def <>[R <: Resource](that: R)(using cc: CanConnect[T, R]): Unit =
-      cc.connect(self, that)
+  object Ops:
+    extension [T <: Resource](self: T)
+      def <>[R](that: R)(using cc: CanConnect[T, R]): Unit =
+        cc.connect(self, that)
+end Resource

core/src/main/scala/dfhdl/platforms/resources/ResourceOwner.scala

@@ -29,4 +29,6 @@ trait ResourceOwner extends ResourceContext:
     dfc.mutableDB.ResourceOwnershipContext.exit()
     dfc.mutableDB.ResourceOwnershipContext.ownerOpt.foreach(_.children += this)
     projectGlobalConstraints()
+
+  export Resource.Ops.*
 end ResourceOwner

internals/src/main/scala/dfhdl/internals/helpers.scala

@@ -326,18 +326,12 @@ extension (str: String)
 end extension
 extension [T](seq: Iterable[T])
   def groupByOrdered[P](f: T => P): List[(P, List[T])] =
-    @tailrec
-    def accumulator(
-        seq: Iterable[T],
-        f: T => P,
-        res: List[(P, Iterable[T])]
-    ): Seq[(P, Iterable[T])] = seq.headOption match
-      case None    => res.reverse
-      case Some(h) =>
-        val key = f(h)
-        val subseq = seq.takeWhile(f(_) equals key)
-        accumulator(seq.drop(subseq.size), f, (key -> subseq) :: res)
-    accumulator(seq, f, Nil).view.map(e => (e._1, e._2.toList)).toList
+    val buf = mutable.LinkedHashMap.empty[P, mutable.ListBuffer[T]]
+    for (elem <- seq)
+      val key = f(elem)
+      buf.getOrElseUpdate(key, mutable.ListBuffer.empty) += elem
+    buf.iterator.map { case (k, v) => (k, v.toList) }.toList
+end extension
 
 lazy val getShellCommand: Option[String] =
   import scala.io.Source