You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Make sure it's clear that the library is always thread and multicore safe, and that the purpose of LFBB_CACHELINE_LENGTH is to avoid the false sharing phenomenom, which reduces performance.
Copy file name to clipboardExpand all lines: README.md
+2-3Lines changed: 2 additions & 3 deletions
Display the source diff
Display the rich diff
Original file line number
Diff line number
Diff line change
@@ -59,14 +59,13 @@ if (!write_started) {
59
59
```
60
60
61
61
## Configuration
62
-
By default the library is configured to be thread and multicore safe on most systems, however some
63
-
configuration may be needed for space efficiency on embedded systems and on systems with nonstandard cacheline lengths.
62
+
Some configuration may be needed for space efficiency on embedded systems and for performance on systems with nonstandard cacheline lengths.
64
63
65
64
The library offers two configuration defines ```LFBB_MULTICORE_HOSTED``` and ```LFBB_CACHELINE_LENGTH``` that can be passed by the build system or defined before including the library.
66
65
67
66
On embedded systems it is usually required to do manual cache synchronization, so ```LFBB_MULTICORE_HOSTED``` can be set to ```false``` to avoid wasting space on padding for cacheline alignment of indexes.
68
67
69
-
Some systems have a non-typical cacheline length (for instance the apple M1/M2 CPUs have a cacheline length of 128 bytes), and ```LFBB_CACHELINE_LENGTH``` should be set accordingly in those cases.
68
+
Some systems have a non-typical cacheline length (for instance the apple M1/M2 CPUs have a cacheline length of 128 bytes), and ```LFBB_CACHELINE_LENGTH``` should be set accordingly in those cases to avoid the false sharing phenomenom and the performance drop that comes from it.
70
69
71
70
## Dealing with caches on embedded systems
72
71
When using the library with DMA or multicore on embedded systems with cache it is necessary to perform manual cache synchronization in one of the following ways:
0 commit comments