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keith-zephyrkartben
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ite/it8xxx2: Fix JTAG support when using a flash offset
If a board defined CONFIG_FLASH_LOAD_OFFSET to a non-zero value, enabling CONFIG_SOC_IT8XXX2_JTAG_DEBUG_INTERFACE generated a linker error because when trying to move the location counter backwards. Fixed by allocating the JTAG section within the deined ROM region. Signed-off-by: Keith Short <[email protected]>
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soc/ite/ec/it8xxx2/linker.ld

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -131,9 +131,9 @@ SECTIONS
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} GROUP_LINK_IN(ROMABLE_REGION)
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#ifdef CONFIG_SOC_IT8XXX2_JTAG_DEBUG_INTERFACE
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#define JTAG_DEBUG_RESERVED_ADDR_START 0x80000800
135-
#define JTAG_DEBUG_RESERVED_ADDR_END 0x800008FF
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/* The CPU address from 0x80000800 to 0x800008FF is reserved for JTAG
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#define JTAG_DEBUG_RESERVED_ADDR_START (ROM_BASE + 0x800)
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#define JTAG_DEBUG_RESERVED_ADDR_END (ROM_BASE + 0x8FF)
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/* The flash range at offset 0x800 to 0x8FF is reserved for JTAG
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* debug usage. */
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SECTION_PROLOGUE(jtag_dbg,,)
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{

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