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boards: infineon: add cy8ckit_062s2_ai support
Add board support for cy8ckit_062s2_ai Signed-off-by: Sandra Schmidt <[email protected]>
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‎boards/infineon/cy8ckit_062s2_ai/Kconfig.cy8ckit_062s2_ai‎

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# Copyright (c) 2024 Arrow Electronics.
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_CY8CKIT_062S2_AI
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select SOC_CY8C624ABZI_S2D44

‎boards/infineon/cy8ckit_062s2_ai/board.cmake‎

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# SPDX-License-Identifier: Apache-2.0
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# During gdb session, by default connect to CM4 core.
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board_runner_args(openocd "--gdb-init=disconnect")
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board_runner_args(openocd "--gdb-init=target extended-remote :3334")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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board_runner_args(pyocd "--target=cy8c6xxa")
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include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)

‎boards/infineon/cy8ckit_062s2_ai/board.yml‎

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# Copyright (c) 2024 Arrow Electronics.
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# SPDX-License-Identifier: Apache-2.0
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board:
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name: cy8ckit_062s2_ai
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full_name: PSOC 6 AI Evaluation Kit
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vendor: infineon
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socs:
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- name: cy8c624abzi_s2d44

‎boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.dts‎

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/*
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* Copyright (c) 2024 Arrow Electronics.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <infineon/cat1a/mpns/CY8C624ABZI_S2D44.dtsi>
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#include <infineon/cat1a/system_clocks.dtsi>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "CY8CKIT-062S2-AI PSOC 6 AI Evaluation Kit";
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compatible = "infineon,cy8ckit_062s2_ai", "cypress,PSOC6";
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chosen {
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zephyr,console = &uart5;
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zephyr,shell-uart = &uart5;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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aliases {
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led0 = &user_led0;
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sw0 = &user_bt;
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watchdog0 = &watchdog0;
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};
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leds {
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compatible = "gpio-leds";
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user_led0: led_0 {
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label = "LED_0";
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gpios = <&gpio_prt5 3 GPIO_ACTIVE_HIGH>;
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};
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user_led1: led_1 {
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label = "LED_1";
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gpios = <&gpio_prt5 4 GPIO_ACTIVE_HIGH>;
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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user_bt: button_0 {
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label = "SW_0";
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gpios = <&gpio_prt5 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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zephyr,code = <INPUT_KEY_0>;
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};
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};
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};
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&fll0 {
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status = "okay";
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clock-frequency = <100000000>;
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};
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&clk_hf0 {
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clock-div = <1>;
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clocks = <&fll0>;
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};
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/* CM4 core clock = 100MHz
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* &fll clock-frequency / &clk_hf0 clock-div / &clk_fast clock-div = 100MHz / 1 / 1 = 100MHz
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*/
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&clk_fast {
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clock-div = <1>;
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};
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/* CM0+ core clock = 50MHz
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* &fll clock-frequency / &clk_hf0 clock-div / &clk_slow clock-div = 100MHz / 1 / 2 = 50MHz
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*/
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&clk_slow {
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clock-div = <2>;
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};
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/* PERI core clock = 100MHz
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* &fll clock-frequency / &clk_hf0 clock-div / &clk_peri clock-div = 100MHz / 1 / 1 = 100MHz
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*/
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&clk_peri {
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clock-div = <1>;
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};
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&gpio_prt5 {
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status = "okay";
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};
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&gpio_prt10 {
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status = "okay";
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};
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/* UART connected to KitProg3 */
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uart5: &scb5 {
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compatible = "infineon,cat1-uart";
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&p5_1_scb5_uart_tx &p5_0_scb5_uart_rx>;
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pinctrl-names = "default";
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};
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uart1: &scb1 {
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compatible = "infineon,cat1-uart";
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&p10_0_scb1_uart_rx &p10_1_scb1_uart_tx>;
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pinctrl-names = "default";
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};
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&p5_1_scb5_uart_tx {
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drive-push-pull;
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};
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&p5_0_scb5_uart_rx {
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input-enable;
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};
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&p10_1_scb1_uart_tx {
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drive-push-pull;
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};
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&p10_0_scb1_uart_rx {
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input-enable;
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};
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&watchdog0 {
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status = "okay";
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};

‎boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.yaml‎

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identifier: cy8ckit_062s2_ai
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name: CY8CKIT-062S2-AI PSOC 6 AI Evaluation Kit
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type: mcu
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arch: arm
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ram: 1024
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flash: 2048
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toolchain:
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- zephyr
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supported:
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- gpio
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- uart
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- watchdog
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vendor: infineon

‎boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai_defconfig‎

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# Copyright (c) 2024 Arrow Electronics.
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# SPDX-License-Identifier: Apache-2.0
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Enable HW stack protection
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CONFIG_HW_STACK_PROTECTION=y
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# Enable console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# Enable UART driver
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CONFIG_SERIAL=y
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# Enable GPIO driver
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CONFIG_GPIO=y
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# Enable clock controller
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CONFIG_CLOCK_CONTROL=y
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# Add catcm0p sleep images for CM0 Devices
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CONFIG_SOC_PSOC6_CM0P_IMAGE_SLEEP=y

‎boards/infineon/cy8ckit_062s2_ai/doc/img/cy8ckit_062s2_ai.webp‎

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‎boards/infineon/cy8ckit_062s2_ai/doc/index.rst‎

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.. zephyr:board:: cy8ckit_062s2_ai
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Overview
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********
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The PSOC 6 AI Evaluation Kit (CY8CKIT-062S2-AI) is a cost effective and small development kit that
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enables design and debug of PSOC 6 MCUs.
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It includes a CY8C624ABZI-S2D44 MCU which is based on a 150-MHz Arm |reg| Cortex |reg|-M4 and
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a 100-MHz Arm |reg| Cortex |reg|-M0+, with 2048 KB of on-chip Flash, 1024 KB of SRAM,
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a Quad-SPI external memory interface, built-in hardware and software security features,
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rich analog, digital, and communication peripherals.
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The board features an AIROC |reg| CYW43439 Wi-Fi & Bluetooth |reg| combo device,
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a 512 MB NOR flash, an onboard programmer/debugger (KitProg3), USB host and device features,
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two user LEDs, and one push button.
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Hardware
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********
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For more information about the CY8C624ABZI-S2D44 MCU SoC and CY8CKIT-062S2-AI board:
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- `CY8C624ABZI-S2D44 MCU SoC Website`_
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- `CY8C624ABZI-S2D44 MCU Datasheet`_
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- `CY8CKIT-062S2-AI Website`_
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- `CY8CKIT-062S2-AI User Guide`_
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- `CY8CKIT-062S2-AI Schematics`_
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Supported Features
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==================
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The ``cy8ckit_062s2_ai/cy8c624abzi_s2d44`` board target supports the following hardware features:
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+-----------+------------+-----------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=======================+
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| NVIC | on-chip | nested vectored |
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| | | interrupt controller |
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+-----------+------------+-----------------------+
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| SYSTICK | on-chip | system clock |
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+-----------+------------+-----------------------+
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| GPIO | on-chip | GPIO |
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+-----------+------------+-----------------------+
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| PINCTRL | on-chip | pin control |
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+-----------+------------+-----------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-----------------------+
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| WATCHDOG | on-chip | watchdog |
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+-----------+------------+-----------------------+
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The default configuration can be found in the defconfig and dts files:
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- :zephyr_file:`boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai_defconfig`
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- :zephyr_file:`boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.dts`
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System Clock
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============
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The PCY8C624ABZI-S2D44 MCU SoC is configured to use the internal IMO+FLL as a source for
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the system clock. CM0+ works at 50MHz, CM4 - at 100MHz. Other sources for the
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system clock are provided in the SoC, depending on your system requirements.
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Fetch Binary Blobs
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******************
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The CY8CKIT-062S2-AI board requires fetch binary files (e.g CM0+ prebuilt images).
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To fetch Binary Blobs:
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.. code-block:: console
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west blobs fetch hal_infineon
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Build blinking led sample
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*************************
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Here is an example for building the :zephyr:code-sample:`blinky` sample application.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: cy8ckit_062s2_ai/cy8c624abzi_s2d44
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:goals: build
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Programming and Debugging
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*************************
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The CY8CKIT-062S2-AI board includes an onboard programmer/debugger (`KitProg3`_)
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to provide debugging, flash programming, and serial communication over USB.
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Flash and debug commands use OpenOCD and require a custom Infineon OpenOCD version,
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that supports KitProg3, to be installed.
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Infineon OpenOCD Installation
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=============================
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Both the full `ModusToolbox`_ and the `ModusToolbox Programming Tools`_ packages include Infineon OpenOCD.
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Installing either of these packages will also install Infineon OpenOCD.
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If neither package is installed, a minimal installation can be done by downloading the `Infineon OpenOCD`_ release
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for your system and manually extract the files to a location of your choice.
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.. note::
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Linux requires device access rights to be set up for KitProg3.
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This is handled automatically by the ModusToolbox and ModusToolbox Programming Tools installations.
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When doing a minimal installation, this can be done manually by executing the script
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``openocd/udev_rules/install_rules.sh``.
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West Commands
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=============
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The path to the installed Infineon OpenOCD executable must be available to the ``west`` tool commands.
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There are multiple ways of doing this.
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The example below uses a permanent CMake argument to set the CMake variable ``OPENOCD``.
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.. tabs::
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.. group-tab:: Windows
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.. code-block:: shell
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# Run west config once to set permanent CMake argument
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west config build.cmake-args -- -DOPENOCD=path/to/infineon/openocd/bin/openocd.exe
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# Do a pristine build once after setting CMake argument
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west build -b cy8ckit_062s2_ai/cy8c624abzi_s2d44 -p always samples/basic/blinky
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west flash
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west debug
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.. group-tab:: Linux
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.. code-block:: shell
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# Run west config once to set permanent CMake argument
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west config build.cmake-args -- -DOPENOCD=path/to/infineon/openocd/bin/openocd
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# Do a pristine build once after setting CMake argument
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west build -b cy8ckit_062s2_ai/cy8c624abzi_s2d44 -p always samples/basic/blinky
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west flash
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west debug
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Alternatively, pyOCD can also be used to flash the board using
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the ``--runner`` (or ``-r``) option:
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.. code-block:: console
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$ west flash --runner pyocd
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References
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**********
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.. target-notes::
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.. _CY8C624ABZI-S2D44 MCU SoC Website:
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https://www.infineon.com/cms/en/product/microcontroller/32-bit-psoc-arm-cortex-microcontroller/psoc-6-32-bit-arm-cortex-m4-mcu/psoc-62/psoc-62x8-62xa/cy8c624abzi-s2d44/
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.. _CY8C624ABZI-S2D44 MCU Datasheet:
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https://www.infineon.com/dgdl/Infineon-PSOC_6_MCU_CY8C62X8_CY8C62XA-DataSheet-v16_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee7d03a70b1
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.. _CY8CKIT-062S2-AI Website:
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https://www.infineon.com/cms/en/product/evaluation-boards/cy8ckit-062s2-ai/?redirId=273839
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.. _CY8CKIT-062S2-AI User Guide:
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https://www.infineon.com/dgdl/Infineon-CY8CKIT_062S2_AI_KIT_GUIDE-UserManual-v01_00-EN.pdf?fileId=8ac78c8c90530b3a01906d4608842668
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.. _CY8CKIT-062S2-AI Schematics:
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https://www.infineon.com/dgdl/Infineon-CY8CKIT-062S2-AI_PSoC_6_AI_Evaluation_Board_Schematic-PCBDesignData-v01_00-EN.pdf?fileId=8ac78c8c8eeb092c018f0af9e109106f
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.. _ModusToolbox:
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https://softwaretools.infineon.com/tools/com.ifx.tb.tool.modustoolbox
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.. _ModusToolbox Programming Tools:
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https://softwaretools.infineon.com/tools/com.ifx.tb.tool.modustoolboxprogtools
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.. _Infineon OpenOCD:
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https://github.com/Infineon/openocd/releases/latest
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.. _KitProg3:
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https://github.com/Infineon/KitProg3

‎boards/infineon/cy8ckit_062s2_ai/support/openocd.cfg‎

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if {[info exists env(OPENOCD_INTERFACE)]} {
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set INTERFACE $env(OPENOCD_INTERFACE)
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} else {
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# By default connect over Debug USB port
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set INTERFACE "cmsis-dap"
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}
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source [find interface/$INTERFACE.cfg]
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transport select swd
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source [find target/psoc6_2m.cfg]

‎soc/infineon/cat1a/psoc6_02/Kconfig.defconfig‎

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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 100000000
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config BUILD_OUTPUT_HEX
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default y
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# add additional die specific params
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endif # SOC_DIE_PSOC6_02

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