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[SPIRV] Support 16-bit Type Cast Intrinsics (microsoft#4679)
* [SPIRV] Support 16-bit Type Cast Intrinsics This change adds support for 16-bit type cast intrinsics by routing them into the same logic used by the 32-bit type casts. With this change in place, asfloat16, asint16, and asuint16 are now translated into OpBitcast in SPIR-V. This change also includes new partial disassembly tests for each function similar to the ones used for 32-bit casts. * Update Comments in processIntrinsicsAsType This commit updates the comments at the top of processIntrinsicsAsType in order to indicate that this function also supports the 16-bit variants of the type casting intrinsics.
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‎tools/clang/lib/SPIRV/SpirvEmitter.cpp

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7969,8 +7969,11 @@ SpirvEmitter::processIntrinsicCallExpr(const CallExpr *callExpr) {
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break;
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case hlsl::IntrinsicOp::IOP_asdouble:
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case hlsl::IntrinsicOp::IOP_asfloat:
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case hlsl::IntrinsicOp::IOP_asfloat16:
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case hlsl::IntrinsicOp::IOP_asint:
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case hlsl::IntrinsicOp::IOP_asint16:
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case hlsl::IntrinsicOp::IOP_asuint:
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case hlsl::IntrinsicOp::IOP_asuint16:
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retVal = processIntrinsicAsType(callExpr);
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break;
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case hlsl::IntrinsicOp::IOP_clip:
@@ -10106,7 +10109,18 @@ SpirvEmitter::processIntrinsicAllOrAny(const CallExpr *callExpr,
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SpirvInstruction *
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SpirvEmitter::processIntrinsicAsType(const CallExpr *callExpr) {
10109-
// This function handles 'asint', 'asuint', 'asfloat', and 'asdouble'.
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// This function handles the following intrinsics:
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// 'asint'
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// 'asint16'
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// 'asuint'
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// 'asuint16'
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// 'asfloat'
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// 'asfloat16'
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// 'asdouble'
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// Note: The logic for the 32-bit and 16-bit variants of these functions is
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// identical so we don't bother distinguishing between related types
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// like float and float16 in the comments.
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// Method 1: ret asint(arg)
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// arg component type = {float, uint}

‎tools/clang/test/CodeGenSPIRV/intrinsics.asfloat16.hlsl

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@@ -0,0 +1,64 @@
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// RUN: %dxc -T vs_6_2 -E main -enable-16bit-types
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// CHECK: OpCapability Float16
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// CHECK: OpCapability Int16
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void main() {
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float16_t result;
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float16_t4 result4;
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// CHECK: [[a:%\d+]] = OpLoad %short %a
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// CHECK-NEXT: [[a_as_half:%\d+]] = OpBitcast %half [[a]]
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// CHECK-NEXT: OpStore %result [[a_as_half]]
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int16_t a;
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result = asfloat16(a);
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// CHECK-NEXT: [[b:%\d+]] = OpLoad %ushort %b
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// CHECK-NEXT: [[b_as_half:%\d+]] = OpBitcast %half [[b]]
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// CHECK-NEXT: OpStore %result [[b_as_half]]
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uint16_t b;
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result = asfloat16(b);
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// CHECK-NEXT: [[c:%\d+]] = OpLoad %half %c
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// CHECK-NEXT: OpStore %result [[c]]
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float16_t c;
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result = asfloat16(c);
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// CHECK-NEXT: [[d:%\d+]] = OpLoad %v4short %d
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// CHECK-NEXT: [[d_as_half:%\d+]] = OpBitcast %v4half [[d]]
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// CHECK-NEXT: OpStore %result4 [[d_as_half]]
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int16_t4 d;
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result4 = asfloat16(d);
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// CHECK-NEXT: [[e:%\d+]] = OpLoad %v4ushort %e
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// CHECK-NEXT: [[e_as_half:%\d+]] = OpBitcast %v4half [[e]]
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// CHECK-NEXT: OpStore %result4 [[e_as_half]]
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uint16_t4 e;
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result4 = asfloat16(e);
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// CHECK-NEXT: [[f:%\d+]] = OpLoad %v4half %f
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// CHECK-NEXT: OpStore %result4 [[f]]
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float16_t4 f;
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result4 = asfloat16(f);
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int16_t2x3 intMat;
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uint16_t2x3 uintMat;
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// CHECK: [[intMat:%\d+]] = OpLoad %_arr_v3short_uint_2 %intMat
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// CHECK-NEXT: [[intMat0:%\d+]] = OpCompositeExtract %v3short [[intMat]] 0
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// CHECK-NEXT: [[row0:%\d+]] = OpBitcast %v3half [[intMat0]]
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// CHECK-NEXT: [[intMat1:%\d+]] = OpCompositeExtract %v3short [[intMat]] 1
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// CHECK-NEXT: [[row1:%\d+]] = OpBitcast %v3half [[intMat1]]
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// CHECK-NEXT: [[g:%\d+]] = OpCompositeConstruct %mat2v3half [[row0]] [[row1]]
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// CHECK-NEXT: OpStore %g [[g]]
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float16_t2x3 g = asfloat16(intMat);
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// CHECK: [[uintMat:%\d+]] = OpLoad %_arr_v3ushort_uint_2 %uintMat
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// CHECK-NEXT: [[uintMat0:%\d+]] = OpCompositeExtract %v3ushort [[uintMat]] 0
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// CHECK-NEXT: [[row0:%\d+]] = OpBitcast %v3half [[uintMat0]]
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// CHECK-NEXT: [[uintMat1:%\d+]] = OpCompositeExtract %v3ushort [[uintMat]] 1
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// CHECK-NEXT: [[row1:%\d+]] = OpBitcast %v3half [[uintMat1]]
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// CHECK-NEXT: [[h:%\d+]] = OpCompositeConstruct %mat2v3half [[row0]] [[row1]]
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// CHECK-NEXT: OpStore %h [[h]]
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float16_t2x3 h = asfloat16(uintMat);
64+
}

‎tools/clang/test/CodeGenSPIRV/intrinsics.asint16.hlsl

Lines changed: 64 additions & 0 deletions
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@@ -0,0 +1,64 @@
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// RUN: %dxc -T vs_6_2 -E main -enable-16bit-types
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// CHECK: OpCapability Int16
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// CHECK: OpCapability Float16
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void main() {
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int16_t result;
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int16_t4 result4;
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// CHECK: [[a:%\d+]] = OpLoad %short %a
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// CHECK-NEXT: OpStore %result [[a]]
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int16_t a;
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result = asint16(a);
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// CHECK: [[b:%\d+]] = OpLoad %ushort %b
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// CHECK-NEXT: [[b_as_short:%\d+]] = OpBitcast %short [[b]]
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// CHECK-NEXT: OpStore %result [[b_as_short]]
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uint16_t b;
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result = asint16(b);
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// CHECK: [[c:%\d+]] = OpLoad %half %c
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// CHECK-NEXT: [[c_as_short:%\d+]] = OpBitcast %short [[c]]
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// CHECK-NEXT: OpStore %result [[c_as_short]]
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float16_t c;
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result = asint16(c);
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// CHECK: [[d:%\d+]] = OpLoad %v4short %d
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// CHECK-NEXT: OpStore %result4 [[d]]
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int16_t4 d;
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result4 = asint16(d);
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// CHECK: [[e:%\d+]] = OpLoad %v4ushort %e
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// CHECK-NEXT: [[e_as_short:%\d+]] = OpBitcast %v4short [[e]]
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// CHECK-NEXT: OpStore %result4 [[e_as_short]]
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uint16_t4 e;
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result4 = asint16(e);
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// CHECK: [[f:%\d+]] = OpLoad %v4half %f
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// CHECK-NEXT: [[f_as_short:%\d+]] = OpBitcast %v4short [[f]]
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// CHECK-NEXT: OpStore %result4 [[f_as_short]]
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float16_t4 f;
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result4 = asint16(f);
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float16_t2x3 floatMat;
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uint16_t2x3 uintMat;
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// CHECK: [[floatMat:%\d+]] = OpLoad %mat2v3half %floatMat
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// CHECK-NEXT: [[floatMat0:%\d+]] = OpCompositeExtract %v3half [[floatMat]] 0
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// CHECK-NEXT: [[row0:%\d+]] = OpBitcast %v3short [[floatMat0]]
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// CHECK-NEXT: [[floatMat1:%\d+]] = OpCompositeExtract %v3half [[floatMat]] 1
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// CHECK-NEXT: [[row1:%\d+]] = OpBitcast %v3short [[floatMat1]]
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// CHECK-NEXT: [[g:%\d+]] = OpCompositeConstruct %_arr_v3short_uint_2 [[row0]] [[row1]]
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// CHECK-NEXT: OpStore %g [[g]]
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int16_t2x3 g = asint16(floatMat);
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// CHECK: [[uintMat:%\d+]] = OpLoad %_arr_v3ushort_uint_2 %uintMat
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// CHECK-NEXT: [[uintMat0:%\d+]] = OpCompositeExtract %v3ushort [[uintMat]] 0
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// CHECK-NEXT: [[row0:%\d+]] = OpBitcast %v3short [[uintMat0]]
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// CHECK-NEXT: [[uintMat1:%\d+]] = OpCompositeExtract %v3ushort [[uintMat]] 1
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// CHECK-NEXT: [[row1:%\d+]] = OpBitcast %v3short [[uintMat1]]
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// CHECK-NEXT: [[h:%\d+]] = OpCompositeConstruct %_arr_v3short_uint_2 [[row0]] [[row1]]
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// CHECK-NEXT: OpStore %h [[h]]
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int16_t2x3 h = asint16(uintMat);
64+
}

‎tools/clang/test/CodeGenSPIRV/intrinsics.asuint16.hlsl

Lines changed: 64 additions & 0 deletions
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@@ -0,0 +1,64 @@
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// RUN: %dxc -T vs_6_2 -E main -enable-16bit-types
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// CHECK: OpCapability Int16
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// CHECK: OpCapability Float16
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void main() {
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uint16_t result;
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uint16_t4 result4;
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// CHECK: [[a:%\d+]] = OpLoad %short %a
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// CHECK-NEXT: [[a_as_ushort:%\d+]] = OpBitcast %ushort [[a]]
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// CHECK-NEXT: OpStore %result [[a_as_ushort]]
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int16_t a;
14+
result = asuint16(a);
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16+
// CHECK: [[b:%\d+]] = OpLoad %ushort %b
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// CHECK-NEXT: OpStore %result [[b]]
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uint16_t b;
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result = asuint16(b);
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// CHECK: [[c:%\d+]] = OpLoad %half %c
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// CHECK-NEXT: [[c_as_ushort:%\d+]] = OpBitcast %ushort [[c]]
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// CHECK-NEXT: OpStore %result [[c_as_ushort]]
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float16_t c;
25+
result = asuint16(c);
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// CHECK: [[d:%\d+]] = OpLoad %v4short %d
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// CHECK-NEXT: [[d_as_ushort:%\d+]] = OpBitcast %v4ushort [[d]]
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// CHECK-NEXT: OpStore %result4 [[d_as_ushort]]
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int16_t4 d;
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result4 = asuint16(d);
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// CHECK: [[e:%\d+]] = OpLoad %v4ushort %e
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// CHECK-NEXT: OpStore %result4 [[e]]
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uint16_t4 e;
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result4 = asuint16(e);
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// CHECK: [[f:%\d+]] = OpLoad %v4half %f
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// CHECK-NEXT: [[f_as_ushort:%\d+]] = OpBitcast %v4ushort [[f]]
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// CHECK-NEXT: OpStore %result4 [[f_as_ushort]]
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float16_t4 f;
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result4 = asuint16(f);
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float16_t2x3 floatMat;
45+
int16_t2x3 intMat;
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// CHECK: [[floatMat:%\d+]] = OpLoad %mat2v3half %floatMat
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// CHECK-NEXT: [[floatMat0:%\d+]] = OpCompositeExtract %v3half [[floatMat]] 0
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// CHECK-NEXT: [[row0:%\d+]] = OpBitcast %v3ushort [[floatMat0]]
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// CHECK-NEXT: [[floatMat1:%\d+]] = OpCompositeExtract %v3half [[floatMat]] 1
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// CHECK-NEXT: [[row1:%\d+]] = OpBitcast %v3ushort [[floatMat1]]
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// CHECK-NEXT: [[g:%\d+]] = OpCompositeConstruct %_arr_v3ushort_uint_2 [[row0]] [[row1]]
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// CHECK-NEXT: OpStore %g [[g]]
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uint16_t2x3 g = asuint16(floatMat);
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// CHECK: [[intMat:%\d+]] = OpLoad %_arr_v3short_uint_2 %intMat
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// CHECK-NEXT: [[intMat0:%\d+]] = OpCompositeExtract %v3short [[intMat]] 0
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// CHECK-NEXT: [[row0:%\d+]] = OpBitcast %v3ushort [[intMat0]]
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// CHECK-NEXT: [[intMat1:%\d+]] = OpCompositeExtract %v3short [[intMat]] 1
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// CHECK-NEXT: [[row1:%\d+]] = OpBitcast %v3ushort [[intMat1]]
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// CHECK-NEXT: [[h:%\d+]] = OpCompositeConstruct %_arr_v3ushort_uint_2 [[row0]] [[row1]]
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// CHECK-NEXT: OpStore %h [[h]]
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uint16_t2x3 h = asuint16(intMat);
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}

‎tools/clang/unittests/SPIRV/CodeGenSpirvTest.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1165,8 +1165,11 @@ TEST_F(FileTest, IntrinsicsAsDouble) {
11651165
runFileTest("intrinsics.asdouble.hlsl");
11661166
}
11671167
TEST_F(FileTest, IntrinsicsAsfloat) { runFileTest("intrinsics.asfloat.hlsl"); }
1168+
TEST_F(FileTest, IntrinsicsAsfloat16) { runFileTest("intrinsics.asfloat16.hlsl"); }
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TEST_F(FileTest, IntrinsicsAsint) { runFileTest("intrinsics.asint.hlsl"); }
1170+
TEST_F(FileTest, IntrinsicsAsint16) { runFileTest("intrinsics.asint16.hlsl"); }
11691171
TEST_F(FileTest, IntrinsicsAsuint) { runFileTest("intrinsics.asuint.hlsl"); }
1172+
TEST_F(FileTest, IntrinsicsAsuint16) { runFileTest("intrinsics.asuint16.hlsl"); }
11701173
TEST_F(FileTest, IntrinsicsAsuintArgumentMustBeRValue) {
11711174
runFileTest("intrinsics.asuint.rvalue.hlsl");
11721175
}

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