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Fix DxilPayloadFieldAnnotation::GetPayloadFieldQualifier (microsoft#6942)
Fixes microsoft#6941
1 parent 775a6b8 commit d6d3f02

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2 files changed

+26
-25
lines changed

2 files changed

+26
-25
lines changed

lib/DXIL/DxilTypeSystem.cpp

Lines changed: 4 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -175,31 +175,13 @@ void DxilPayloadFieldAnnotation::AddPayloadFieldQualifier(
175175
DXIL::PayloadAccessQualifier
176176
DxilPayloadFieldAnnotation::GetPayloadFieldQualifier(
177177
DXIL::PayloadAccessShaderStage shaderStage) const {
178+
if (!HasAnnotations())
179+
return DXIL::PayloadAccessQualifier::ReadWrite;
178180

179181
int bitOffset = GetBitOffsetForShaderStage(shaderStage);
180-
181-
// default type is always ReadWrite
182-
DXIL::PayloadAccessQualifier accessType =
183-
DXIL::PayloadAccessQualifier::ReadWrite;
184-
185-
const unsigned readBit =
186-
static_cast<unsigned>(DXIL::PayloadAccessQualifier::Read);
187-
const unsigned writeBit =
188-
static_cast<unsigned>(DXIL::PayloadAccessQualifier::Write);
189-
190182
unsigned accessBits = m_bitmask >> bitOffset;
191-
if (accessBits & readBit) {
192-
// set Read if the first bit is set
193-
accessType = DXIL::PayloadAccessQualifier::Read;
194-
}
195-
if (accessBits & writeBit) {
196-
197-
// set Write only if the second bit set, if both are set set to ReadWrite
198-
accessType = accessType == DXIL::PayloadAccessQualifier::ReadWrite
199-
? DXIL::PayloadAccessQualifier::Write
200-
: DXIL::PayloadAccessQualifier::ReadWrite;
201-
}
202-
return accessType;
183+
return (DXIL::PayloadAccessQualifier)(
184+
accessBits & DXIL::PayloadAccessQualifierValidMaskPerStage);
203185
}
204186

205187
bool DxilPayloadFieldAnnotation::HasAnnotations() const {

tools/clang/unittests/HLSL/DxilModuleTest.cpp

Lines changed: 22 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -571,9 +571,11 @@ TEST_F(DxilModuleTest, PayloadQualifier) {
571571
"{\n"
572572
" double a : read(caller, closesthit, anyhit) : "
573573
"write(caller, miss, closesthit);\n"
574+
" int b : read(caller) : write(miss);\n"
574575
"};\n\n"
575576
"[shader(\"miss\")]\n"
576-
"void Miss( inout Payload payload ) { payload.a = 4.2; }\n";
577+
"void Miss( inout Payload payload ) { payload.a = 4.2; "
578+
"payload.b = 1; }\n";
577579

578580
c.Compile(shader, L"lib_6_6", arguments, {});
579581

@@ -582,9 +584,9 @@ TEST_F(DxilModuleTest, PayloadQualifier) {
582584

583585
for (auto &p : DTS.GetPayloadAnnotationMap()) {
584586
const DxilPayloadAnnotation &plAnnotation = *p.second;
585-
for (unsigned i = 0; i < plAnnotation.GetNumFields(); ++i) {
587+
{
586588
const DxilPayloadFieldAnnotation &fieldAnnotation =
587-
plAnnotation.GetFieldAnnotation(i);
589+
plAnnotation.GetFieldAnnotation(0);
588590
VERIFY_IS_TRUE(fieldAnnotation.HasAnnotations());
589591
VERIFY_ARE_EQUAL(DXIL::PayloadAccessQualifier::ReadWrite,
590592
fieldAnnotation.GetPayloadFieldQualifier(
@@ -599,6 +601,23 @@ TEST_F(DxilModuleTest, PayloadQualifier) {
599601
fieldAnnotation.GetPayloadFieldQualifier(
600602
DXIL::PayloadAccessShaderStage::Anyhit));
601603
}
604+
{
605+
const DxilPayloadFieldAnnotation &fieldAnnotation =
606+
plAnnotation.GetFieldAnnotation(1);
607+
VERIFY_IS_TRUE(fieldAnnotation.HasAnnotations());
608+
VERIFY_ARE_EQUAL(DXIL::PayloadAccessQualifier::Read,
609+
fieldAnnotation.GetPayloadFieldQualifier(
610+
DXIL::PayloadAccessShaderStage::Caller));
611+
VERIFY_ARE_EQUAL(DXIL::PayloadAccessQualifier::NoAccess,
612+
fieldAnnotation.GetPayloadFieldQualifier(
613+
DXIL::PayloadAccessShaderStage::Closesthit));
614+
VERIFY_ARE_EQUAL(DXIL::PayloadAccessQualifier::Write,
615+
fieldAnnotation.GetPayloadFieldQualifier(
616+
DXIL::PayloadAccessShaderStage::Miss));
617+
VERIFY_ARE_EQUAL(DXIL::PayloadAccessQualifier::NoAccess,
618+
fieldAnnotation.GetPayloadFieldQualifier(
619+
DXIL::PayloadAccessShaderStage::Anyhit));
620+
}
602621
}
603622
}
604623

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