Skip to content

Commit 1707b84

Browse files
author
kevyuu
committed
Move required subgroups size stages checking to commonCreatePipelines
1 parent efecb7e commit 1707b84

File tree

5 files changed

+58
-7
lines changed

5 files changed

+58
-7
lines changed

include/nbl/video/IGPUComputePipeline.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,15 @@ class IGPUComputePipeline : public IGPUPipeline<asset::IComputePipeline<const IG
6262
return retval;
6363
}
6464

65+
inline core::bitflag<hlsl::ShaderStage> getRequiredSubgroupStages() const
66+
{
67+
if (shader.requiredSubgroupSize >= asset::IPipelineBase::SUBGROUP_SIZE::REQUIRE_4)
68+
{
69+
return hlsl::ESS_COMPUTE;
70+
}
71+
return {};
72+
}
73+
6574
IGPUPipelineLayout* layout = nullptr;
6675
// TODO: Could guess the required flags from SPIR-V introspection of declared caps
6776
core::bitflag<FLAGS> flags = FLAGS::NONE;

include/nbl/video/IGPUGraphicsPipeline.h

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -67,6 +67,23 @@ class IGPUGraphicsPipeline : public IGPUPipeline<asset::IGraphicsPipeline<const
6767
return retval;
6868
}
6969

70+
inline core::bitflag<hlsl::ShaderStage> getRequiredSubgroupStages() const
71+
{
72+
core::bitflag<hlsl::ShaderStage> stages;
73+
auto processSpecInfo = [&](const SShaderSpecInfo& spec, hlsl::ShaderStage stage)
74+
{
75+
if (spec.requiredSubgroupSize >= SUBGROUP_SIZE::REQUIRE_4) {
76+
stages |= stage;
77+
}
78+
};
79+
processSpecInfo(vertexShader, hlsl::ESS_VERTEX);
80+
processSpecInfo(tesselationControlShader, hlsl::ESS_TESSELLATION_CONTROL);
81+
processSpecInfo(tesselationEvaluationShader, hlsl::ESS_TESSELLATION_EVALUATION);
82+
processSpecInfo(geometryShader, hlsl::ESS_GEOMETRY);
83+
processSpecInfo(fragmentShader, hlsl::ESS_FRAGMENT);
84+
return stages;
85+
}
86+
7087
IGPUPipelineLayout* layout = nullptr;
7188
SShaderSpecInfo vertexShader;
7289
SShaderSpecInfo tesselationControlShader;

include/nbl/video/IGPURayTracingPipeline.h

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -143,6 +143,30 @@ class IGPURayTracingPipeline : public IGPUPipeline<asset::IRayTracingPipeline<c
143143

144144
return retval;
145145
}
146+
147+
inline core::bitflag<hlsl::ShaderStage> getRequiredSubgroupStages() const
148+
{
149+
core::bitflag<hlsl::ShaderStage> stages;
150+
auto processSpecInfo = [&](const SShaderSpecInfo& spec, hlsl::ShaderStage stage)
151+
{
152+
if (spec.requiredSubgroupSize >= SUBGROUP_SIZE::REQUIRE_4) {
153+
stages |= stage;
154+
}
155+
};
156+
processSpecInfo(shaderGroups.raygen, hlsl::ESS_RAYGEN);
157+
for (const auto& miss : shaderGroups.misses)
158+
processSpecInfo(miss, hlsl::ESS_MISS);
159+
for (const auto& hit : shaderGroups.hits)
160+
{
161+
processSpecInfo(hit.closestHit, hlsl::ESS_CLOSEST_HIT);
162+
processSpecInfo(hit.anyHit, hlsl::ESS_ANY_HIT);
163+
processSpecInfo(hit.intersection, hlsl::ESS_INTERSECTION);
164+
}
165+
for (const auto& callable : shaderGroups.callables)
166+
processSpecInfo(callable, hlsl::ESS_CALLABLE);
167+
return stages;
168+
}
169+
146170
};
147171

148172
struct SShaderGroupHandle

include/nbl/video/ILogicalDevice.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1259,6 +1259,14 @@ class NBL_API2 ILogicalDevice : public core::IReferenceCounted, public IDeviceMe
12591259
return {};
12601260
}
12611261

1262+
// https://registry.khronos.org/vulkan/specs/1.3-extensions/man/html/VkPipelineShaderStageCreateInfo.html#VUID-VkPipelineShaderStageCreateInfo-pNext-02755
1263+
const auto requiredSubgroupSizeStages = getPhysicalDeviceLimits().requiredSubgroupSizeStages;
1264+
if (!requiredSubgroupSizeStages.hasFlags(ci.getRequiredSubgroupStages()))
1265+
{
1266+
NBL_LOG_ERROR("Invalid shader stage");
1267+
return {};
1268+
}
1269+
12621270
retval += validation;
12631271
}
12641272
return retval;

src/nbl/video/ILogicalDevice.cpp

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -812,13 +812,6 @@ bool ILogicalDevice::createComputePipelines(IGPUPipelineCache* const pipelineCac
812812
{
813813
const auto& ci = params[ix];
814814

815-
// https://registry.khronos.org/vulkan/specs/1.3-extensions/man/html/VkPipelineShaderStageCreateInfo.html#VUID-VkPipelineShaderStageCreateInfo-pNext-02755
816-
if (ci.shader.requiredSubgroupSize>=asset::IPipelineBase::SUBGROUP_SIZE::REQUIRE_4 && !getPhysicalDeviceLimits().requiredSubgroupSizeStages.hasFlags(hlsl::ShaderStage::ESS_COMPUTE))
817-
{
818-
NBL_LOG_ERROR("Invalid shader stage");
819-
return false;
820-
}
821-
822815
const core::set entryPoints = { asset::ISPIRVDebloater::EntryPoint{.name = ci.shader.entryPoint, .stage = hlsl::ShaderStage::ESS_COMPUTE} };
823816
debloatedShaders.push_back(m_spirvDebloater->debloat(ci.shader.shader, entryPoints, m_logger));
824817
auto debloatedShaderSpec = ci.shader;

0 commit comments

Comments
 (0)